N8 PACKAGE DIMENSION Search Results

TO-243

Contextual Info: Package Outline 3-Lead TO-243AA SOT-89 Package Outline (N8) b Symbol Dimensions (mm) b1 A b b1 C D D1 E E1 MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.13 NOM - - - - - - - - MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 e e1 1.50 BSC 3.00 BSC H L 3.94 0.89 -

S8 Package

Abstract: Diode LT 228 LT 076 LT1016 N8 package Dimension lt 0229 LTC DWG 05-08-1610
Contextual Info: SPECIFICATION NOTICE LT1016 October 1997 The LT 1016 data sheet has been modified. The packaging information has been updated. Change TJMAX for the N8 package and the S8 package from 100°C to 125°C. Change θJA for the S8 package from 120°C/W to 150°C/W. Also, omit Note #2 for the S8 package, ”LEAD

DSPD-3TO243AAN8

Contextual Info: Package Outline 3-Lead TO-243AA SOT-89 Package Outline (N8) b Symbol Dimensions (mm) b1 A b b1 C D D1 E E1 MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00 NOM - - - - - - - - MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 e e1 1.50 BSC 3.00 BSC † H L 3.94 0.89

a807

Abstract: 7272 TO-243AA
Contextual Info: Package Outlines 3 LEAD TO-243AA SOT-89 Surface Mount Package (N8) 0.177 ± 0.004 (4.4958 ± 0.1016) 0.068 ± 0.004 (1.7272 ± 0.1016) 0.059 ± 0.004 (1.4986 ± 0.1016) D A D1 0.161 ± 0.006 (4.0894 ± 0.1524) H 0.096 ± 0.006 (2.4384 ± 0.1524) E 0.041 ± 0.006

TO-243AA

Abstract: PO23 jedec Package LND150N8 equivalent PO24 LND150N8 TO243AA
Contextual Info: Package Outlines .173 .181 .064 .072 .155 .167 .035 .047 1 2 .014 .019 .055 .063 3 .090 .102 .017 .022 .059 BSC .014 .017 .084 .090 1-Gate 2-Drain 3-Source .118 BSC For LND150N8 only: 1-Gate 2-Source 3-Drain TO-243AA SOT-89 Surface Mount "N8" Package 17

Contextual Info: N8 Package 8-Lead PDIP Narrow .300 Inch (Reference LTC DWG # 05-08-1510) .400* (10.160) MAX 8 7 6 5 1 2 3 4 .255 ± .015* (6.477 ± 0.381) .300 – .325 (7.620 – 8.255) .008 – .015 (0.203 – 0.381) ( +.035 .325 –.015 8.255 +0.889 –0.381 NOTE: 1. DIMENSIONS ARE

IC OP AMP for Piezoelectric transducers

Abstract: servo accelerometer aCCELEROMETER APPLICATION CIRCUIT accelerometer b 0P215
Contextual Info: r j uTECHNOLOGY r m F€RTUR€S • ■ ■ ■ ■ ■ ■ ■ ■ ■ Input Bias Current, W arm ed Up: 20pA Max 100% Tested Low Voltage Noise: 8nV/VHz Max S8 and N8 Package Standard Pinout Very Low Input Capacitance: 1.5pF Voltage Gain: 1.2 Million Min

Contextual Info: LT1169 Dual Low Noise, Picoampere Bias Current, JFET Input Op Amp DESCRIPTIO U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ Input Bias Current, Warmed Up: 20pA Max 100% Tested Low Voltage Noise: 8nV/√Hz Max S8 and N8 Package Standard Pinout Very Low Input Capacitance: 1.5pF

IC OP AMP for Piezoelectric transducers

Abstract: hydrophone transducer LT1169CS8 servo accelerometer 1N914 2N3904 LT1113 LT1169 LT1169CN8 S1336-5BK
Contextual Info: LT1169 Dual Low Noise, Picoampere Bias Current, JFET Input Op Amp U DESCRIPTIO FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ Input Bias Current, Warmed Up: 20pA Max 100% Tested Low Voltage Noise: 8nV/√Hz Max S8 and N8 Package Standard Pinout Very Low Input Capacitance: 1.5pF

4384

Abstract: 7272 LND150N8
Contextual Info: Package Outlines TO-243AA SOT-89:N8 0.177 ± 0.004 (4.4958 ± 0.1016) 0.068 ± 0.004 (1.7272 ± 0.1016) 0.059 ± 0.004 (1.4986 ± 0.1016) D A D1 0.161 ± 0.006 (4.0894 ± 0.1524) H 0.096 ± 0.006 (2.4384 ± 0.1524) E 0.041 ± 0.006 (1.0414 ± 0.1524) L 0.0165 ± 0.0025

Contextual Info: r r u r m TECHNOLOGY _LT1169 Dual Low Noise, P ic o a m p e re Bias C urrent, JFET In p u t O p A m p F€RTUR€S DCSCRIPTIOn • Input Bias Current, W arm ed Up: 20pA Max ■ 100% Tested Low Voltage Noise: 8nV/Vflz Max ■ S8 and N8 Package Standard Pinout

RS468

Abstract: transistor dg sot-23 BENT LEAD transistor TO-92 Outline Dimensions P005 n7 transistor P012 B W4 Transistor GP007 transistor W4 sot-23
Contextual Info: Package Options TO-39 N2, B TO-52 (N9) TO-92 (N3, L, LL) DIP Plastic (N4, N6, NA, J, P) DIP Ceramic (NC, N7, P, C) Side Braze (NC, N7) TO-220 (N5) 7-Pin TO-220 (K2) TO-243 AA (SOT-89) (N8) SOT-23 (K1) TO-3 (N1) Die in Wafer Form (NW, XW) Die on adhesive

ba7106

Contextual Info: PAL and SECAM discriminator, with switch, for use in delay lines BA7106LS The BA7106LS includes a PAL and SECAM discriminator on a single chip. Dimensions Units : mm BA7106LS (SZIP24) The IC contains a glass delay line amplifier, and an amplifier output switch.

BA7106LS

Abstract: N4 Amplifier GV-28 SZIP24 discriminator 5.5 Mhz ba7106
Contextual Info: BA7106LS PAL and SECAM discriminator, with switch, for use in delay lines The BA7106LS includes a PAL and SECAM discriminator on a single chip. Dimensions Units: mm BA7106LS (SZIP24) The IC contains a glass delay line amplifier, and an amplifier output switch.

8 lead soic-n package R8

Abstract: ADM705 ADM707 adm705arzreel1 ADM706 MAX705 MAX708 MO-187-AA Package BA RM-8 ADM708ANZ
Contextual Info: Low Cost Microprocessor Supervisory Circuits ADM705/ADM706/ADM707/ADM708 FUNCTIONAL BLOCK DIAGRAMS WATCHDOG INPUT WDI WATCHDOG TRANSITION DETECTOR VCC 250 A MR 4.65V* ADM705/ ADM706 POWER-FAIL INPUT (PFI) WATCHDOG OUTPUT (WDO) RESET AND WATCHDOG TIMEBASE

Contextual Info: THERMAL VARIABLE ATTENUATORS E-TA •FEATURES ■APPLICATIONS ● Flat VSWR characteristic to the temperature change. ● Linear attenuation characteristic to temperature fluctuation. ● RoHS compliant. ● Temperature compensation of microwave high power

Contextual Info: FDP038AN06A0 / FDI038AN06A0 N-Channel PowerTrench MOSFET 60 V, 80 A, 3.8 mΩ Features Applications • RDS on = 3.5 mΩ ( Typ.) @ VGS = 10 V, ID = 80 A • Synchronous Rectification for ATX / Server / Telecom PSU • QG(tot) = 96 nC ( Typ.) @ VGS = 10 V

Contextual Info: HUF75545P3, HUF75545S3S Semiconductor June 1999 Data Sheet File Num ber 4738.1 75A, 80V, 0.010 Ohm, N-Channel, UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB SOURCE DRAIN FLANGE • Ultra Low On-Resistance • rDS(ON) = 0.01 O il,

Contextual Info: FDP047AN08A0 / FDH047AN08A0 N-Channel PowerTrench MOSFET 75 V, 80 A, 4.7 mΩ Features Applications • R DS ON = 4.0 m Ω (Typ.), VGS = 10 V, ID = 80 A • Synchronous Rectification for ATX / Server / Telecom PSU • Qg(tot) = 92 nC (Typ.), VGS = 10V • Battery Protection Circuit

FDM606P

Abstract: m073
Contextual Info: FDM606P P-Channel 1.8V Logic Level Power Trench MOSFET General Description Features This P-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching

Contextual Info: FDP070AN06A0 N-Channel PowerTrench MOSFET 60 V, 80 A, 7 mΩ Features Applications • RDS on = 6.1 mΩ (Typ.) @ VGS = 10 V, ID = 80 A • Synchronous Rectification for ATX / Server / Telecom PSU • Qg(tot) = 51 nC (Typ.) @ VGS = 10 V • Battery Protection Circuit

FDP2532

Abstract: FDP2532 Mosfet
Contextual Info: FDP2532 / FDB2532 N-Channel PowerTrench MOSFET 150 V, 79 A, 16 mΩ Features Applications • RDS on = 14 mΩ ( Typ.) @ VGS = 10 V, ID = 33 A • Consumer Appliances • QG(tot) = 82 nC ( Typ.) @ VGS = 10 V • Synchronous Rectification • Low Miller Charge

76105DK8

Contextual Info: HUF76105DK8 S e m ic o n d u c to r October 1998 Data Sheet • Logic Level Gate Drive This N-Channel power MOSFET is manufactured using the innovative UltraFET process. This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in

Contextual Info: FDD16AN08A0 N-Channel PowerTrench MOSFET 75 V, 50 A, 16 mΩ Features Applications • RDS on = 13 mΩ ( Typ.) @ VGS = 10 V, ID = 50 A • Synchronous Rectification • QG(tot) = 31 nC ( Typ.) @ VGS = 10 V • Battery Protection Circuit • Low Miller Charge