MUX11 Search Results

nec 765 fdc

Abstract: W83877ATF W83877AF W83877F PC97 RECS-80 APM 2510 irsl200 NEC marking 8215 date code
Contextual Info: W83877ATF WINBOND I/O W83877ATF Data Sheet Revision History Pages Dates Version 1 n.a. 07/29/97 0.50 2 1,3,6,49,50,98,140, 141,142,170 04/10/98 0.51 Version on Web Main Contents First published. A1 Typo correction and data calibrated 3 4 5 6 7 8 9 10 Please note that all data and specifications are subject to change without notice. All

Dynachip

Abstract: SR flip flop using discrete gates T flip flop pin configuration DL-5000 i33b DL5000 DL5064 DL5256 DL5528 MUX24
Contextual Info: DL5000 Family Fast Field Programmable Gate Array Features • Fast Field Programmable Gate Arrays™ Patented Active Repeater™ Architecture Data and Clock Rates up to 270 MHz Complex operations up to 200 MHz Input Block Register Setup Time 800 ps Output Block Register Clock-to-out 1.6 ns

Contextual Info: ADS131E04 ADS131E06 ADS131E08 www.ti.com SBAS561 – JUNE 2012 Analog Front-End for Power Monitoring, Control, and Protection Check for Samples: ADS131E04, ADS131E06 , ADS131E08 FEATURES 1 • • 23 • • • • • • • • Eight Differential Current and Voltage Inputs

Contextual Info: W83877F WINBOND I/O GENERAL DESCRIPTION One of Winbond's popular series of I/O chips, the W83877F integrates a disk drive adapter, serial port UART , parallel port, IDE bus interface, and game port decoder onto a single chip. The W83877F is an enhanced version of the W83777F, with additional powerful features such as configurable plug-andplay registers for the whole chip and infrared support in one of the serial ports.

Contextual Info: CDC7005 3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685A − DECEMBER 2002 − REVISED FEBRUARY 2003 D High Performance 1:5 PLL Clock D D D D D D D D D D D D D D D Synchronizer Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock

VLCD25

Abstract: G5616
Contextual Info: ST62T80B/E80B 8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.0 to 6.0V Supply Operating Range 8 MHz Maximum Clock Frequency -40 to +85°C Operating Temperature Range

W83877TF

Abstract: W83877TG MOB2 CR10 CR14
Contextual Info: WINBOND I/O W83877TF/W83877TG Release Date: May 2006 Version: 0.7 W83877TF/W83877TG W83877TF Datasheet Revision History PAGES DATES VERSION VERSION MAIN CONTENTS ON WEB 1 n.a. 03/20/97 0.50 Not published, for internal reference only. 2 n.a. 05/20/97 0.60 First published.

BT 804 triac

Abstract: COM16 PQFP80 ST6285B ST6285-EMU2 ST62E85B ST62T85B BT 1840 PA
Contextual Info: ST62T85B/E85B 8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.0 to 6.0V Supply Operating Range 8 MHz Maximum Clock Frequency -40 to +85°C Operating Temperature Range

MUX21

Abstract: CDC7005 MUX22
Contextual Info: CDC7005 3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685E − DECEMBER 2002 − REVISED NOVEMBER 2004 D High Performance 1:5 PLL Clock D D D D D D D D D D D D D D D Synchronizer Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock

Contextual Info: CDC7005 3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685I − DECEMBER 2002 − REVISED APRIL 2006 D High Performance 1:5 PLL Clock D D D CTRL_ CLK CTRL_ DATA CP_OUT OPA_IN 7 8 OPA_IP OPA_OUT STATUS_ LOCK GND GND GND GND C I_REF GND AVCC

vhdl coding for pipeline

Abstract: verilog code of 2 bit comparator verilog code for 4 bit ripple COUNTER RAM32X32 structural vhdl code for ripple counter
Contextual Info: Synopsys Synthesis Methodology Guide UNIX ® Environments Actel Corporation, Sunnyvale, CA 94086 1998 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 5579009-3 Release: October 1999 No part of this document may be copied or reproduced in any form or by

W83877AF

Abstract: W83777F RECS-80 W83877F xd2 c joystick taa 765A xd2 joystick 3481k w83777
Contextual Info: W83877AF TABLE OF CONTENTS GENERAL DESCRIPTION .1 FEATURES .2

Contextual Info: ADS1299 www.ti.com SBAS499A – JULY 2012 – REVISED AUGUST 2012 Low-Noise, 8-Channel, 24-Bit Analog Front-End for Biopotential Measurements Check for Samples: ADS1299 FEATURES 1 • 23 • • • • • • • • The ADS1299 has a flexible input multiplexer per

sony ps3 eye camera

Abstract: 6d40 engine diagram sgx530* vector graphics manual dsi CVBS BTA 16 6008 PowerVR SGX series 5 "cmos camera "mc 7258 wiring diagram ccd camera mc 7218 wiring diagram ET 439 power module fuji
Contextual Info: Public Version AR Y OMAP OMAP34xx Multimedia Device Silicon Revision 3.1, 3.1.1 Texas Instruments OMAP™ Family of Products EL IM IN Version R PR Technical Reference Manual Literature Number: SWPU114R July 2007 – Revised April 2009 Public Version www.ti.com

32 NAC 12 T42

Abstract: NSM 4000A jrc 2340 DD607 S53 MARKING
Contextual Info: E ï . S G S -T H O M S O N ÎILiCT^OlDes ST6280 8-BIT HCMOS MCU WITH DOT MATRIX LCD DRIVER EEPROM AND A/D CONVERTER • 4.5 to 6V supply operating range ■ 8.4 MHz Maximum Clock Frequency ■ -40 to +85°C Operating Temperature Range ■ Run, Wait & Stop Modes

Contextual Info: CDC7005 3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685I − DECEMBER 2002 − REVISED APRIL 2006 D High Performance 1:5 PLL Clock D D D CTRL_ CLK CTRL_ DATA CP_OUT OPA_IN 7 8 OPA_IP OPA_OUT STATUS_ LOCK GND GND GND GND C I_REF GND AVCC

SOURCE CODE FOR DIGITAL WEIGHT SCALE

Abstract: Rogowski Coil G-001 sensor 43a ads131e08 spwh
Contextual Info: ADS131E04 ADS131E06 ADS131E08 www.ti.com SBAS561 – JUNE 2012 Analog Front-End for Power Monitoring, Control, and Protection Check for Samples: ADS131E04, ADS131E06 , ADS131E08 FEATURES 1 • • 23 • • • • • • • • Eight Differential Current and Voltage Inputs

MUX21

Contextual Info: CDC7005 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER SCAS685A – DECEMBER 2002 – REVISED FEBRUARY 2003 D High Performance 1:5 PLL Clock TERMINAL ASSIGNMENTS TOP VIEW Synchronizer D Two Clock Inputs: VCXO_IN Clock Is D D D D D D D D D D

BT 804 triac

Abstract: JRC 2537 triac BT 742 ST6280-EMU2 s49c ST6280B ST62E80B ST62T80 ST62T80B DIAGRAM AVR GENERATOR analog pds
Contextual Info: 7 7 SGS-THOMSON k7 A EflDgK [l[L[i g¥[S©raD@g ST62T80B/E80B 8-BIT O TP/EPRO M MCU W ITH LCD DRIVER, EEPROM AND A/D C O N VER TER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.0 to 6.0V Supply Operating Range

MUX21

Abstract: CDC7005
Contextual Info: CDC7005 3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685D − DECEMBER 2002 − REVISED AUGUST 2004 D High Performance 1:5 PLL Clock D D D D D D D D D D D D D D D Synchronizer Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock

CDC7005

Abstract: MUX21
Contextual Info: CDC7005 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER SCAS685A – DECEMBER 2002 – REVISED FEBRUARY 2003 D High Performance 1:5 PLL Clock TERMINAL ASSIGNMENTS TOP VIEW Synchronizer D Two Clock Inputs: VCXO_IN Clock Is D D D D D D D D D D

CDC7005

Abstract: MUX21
Contextual Info: CDC7005 3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685E − DECEMBER 2002 − REVISED NOVEMBER 2004 D High Performance 1:5 PLL Clock D D D D D D D D D D D D D D D Synchronizer Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock

MC68701U4

Abstract: MC6803U4-1 MC6803U4 MC6801U4/6803U4
Contextual Info: MOTOROLA • i SEMICONDUCTOR TECHNICAL DATA MC6801U4 MC6803U4 Advance Information Microcontroller/Microprocessor MCU/MPU The MC6801U4 is an 8-bit single-chip microcontroller unit(MCU) that enhances the capabilities of the MC6801 and significantly enhances the capabilities of the M6800 Family of parts. It includes an

Contextual Info: User's Guide SBAU202 – June 2012 Performance Demonstration Kit for the ADS130E08 Figure 1. ADS130E08EVM-PDK This user's guide describes the characteristics, operation, and use of the ADS130E08EVM-PDK. This performance demonstration kit is an evaluation module for the ADS130E08, an eight-channel, 16-bit, lowpower, integrated analog front-end AFE designed for power protection circuits. The ADS130E08EVMPDK is intended for prototyping and evaluation. This user's guide includes a complete circuit description,