MULTIPLIER BIT Search Results

LMS12JC65

Abstract: LMS12GC65 LMS12JC35 LMS12JC40 LMS12JC50 LMS12 fir filter applications smd capacitor a5
Contextual Info: LMS12 LMS12 DEVICES INCORPORATED 12-bit Cascadable Multiplier-Summer 12-bit Cascadable Multiplier-Summer DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer ❑ Summer has 26-bit Input Port Fully Independent from Multiplier

LMS12

Abstract: LMS12JC35 LMS12JC40 fir filter applications LMS1250
Contextual Info: LMS12 LMS12 DEVICES INCORPORATED 12-bit Cascadable Multiplier-Summer 12-bit Cascadable Multiplier-Summer DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer The LMS12 is a high-speed 12 x 12-bit combinatorial multiplier integrated

atmel 306

Abstract: ATMEL 529 atmel 228 atmel 334 atmel 438 AT40K AT40KAL AT94K mps16
Contextual Info: IP Core Generator: Multiplier Features • • • • • • • • • • • Multiplier – Serial Parallel Multiplier – Signed Multiplier – Signed, Pipeline x 1 Multiplier – Unsigned Multiplier – Unsigned, Pipeline x 1 Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for

Contextual Info: LMS12 LMS12 12-bit Cascadable Multiplier-Summer DEVICES INCORPORATED DESCRIPTION FEATURES □ 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer □ Summer has 26-bit Input Port Fully Independent from Multiplier Inputs □ Cascadable to Form Video Rate FIR

CD4089BCN

Abstract: 74LS AN-90 C1995 CD4089B CD4089BC CD4089BM CD4527B CD4527BC CD4527BM
Contextual Info: CD4089BM CD4089BC Binary Rate Multiplier CD4527BM CD4527BC BCD Rate Multiplier General Description Features The CD4089B is a 4-bit binary rate multiplier that provides an output pulse rate which is the input clock pulse rate multiplied by times the binary input number For example if

IC to design 2 by 2 binary multiplier

Abstract: MC14554B MC14XXXBCL MC14XXXBCP MC14XXXBD binary multiplier circuit binary multiplier
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14554B 2-Bit by 2-Bit Parallel Binary Multiplier The MC14554B 2 x 2–bit parallel binary multiplier is constructed with complementary MOS CMOS enhancement mode devices. The multiplier can perform the multiplication of two binary numbers and simultaneously add

112KJ4C

Abstract: MPY112K 112kj4 trw mpy 16 MPY112 MPY012H MPY112KJ4A MPY112KJ4C TRW LSI Products 112kj
Contextual Info: MPY112K r n Multiplier Features 12x12 Bit, 50ns • 50ns Multiply Time Worst Case The MPY112K is a video-speed 12x12 bit parallel multiplier which operates at a 50ns cycle time (20MHz multiplication rate). The multiplicand and the multiplier may be specified together as two's complement or

KA5 capacitor

Abstract: LF2250 TMC2250 ka2 DIODE K-A1N NKC3 matrix multiplier lf2250gc MSB2112 diode ka2 b4
Contextual Info: LF2250 LF2250 DEVICES INCORPORATED 12 x 10-bit Matrix Multiplier 12 x 10-bit Matrix Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 50 MHz Data and Computation Rate ❑ Nine Multiplier Array with 12-bit Data and 10-bit Coefficient Inputs ❑ Separate 16-bit Cascade Input and

ka4 smd capacitor

Abstract: ka9 smd smd ka4 SMD ka1 LF2250 TMC2250 LF2250GC25 smd ka2 diode
Contextual Info: LF2250 LF2250 DEVICES INCORPORATED 12 x 10-bit Matrix Multiplier 12 x 10-bit Matrix Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 50 MHz Data and Computation Rate ❑ Nine Multiplier Array with 12-bit Data and 10-bit Coefficient Inputs ❑ Separate 16-bit Cascade Input and

M1412

Contextual Info: CFB2021A CFB2021A MPY GENERAL DESCRIPTION: 16 X 16 MIXED-MODE MULTIPLIER, RDING:2*15 CFB2021A is a mixed-mode multiplier that takes two 16-bit operands and produces a 32-bit product. The multiplier supports unsigned and signed two’s complement, and mixed mode multiply. Sign interpretation

"multiplier accumulator"

Abstract: 7210l45 TDC-1010J CY7C510 TDC1010J binary multiplier datasheet p2103 7210L65 cypress TMA
Contextual Info: IDT7210L 16 x 16 PARALLEL CMOS MULTIPLIER ACCUMULATOR COMMERCIAL TEMPERATURE RANGE 16-BIT PARALLEL CMOS MULTIPLIER-ACCUMULATOR IDT7210L FEATURES: featuring individual input and output registers with clocked D-type flip-flop, - 16 x 16 parallel multiplier-accumulator with selectable accumulation and a preload capability which enables input data to be preloaded into the output

"multiplier accumulator"

Abstract: CY7C510 7210l45 binary multiplier AM29510 IDT7210 IDT7210L TDC1010J TMC2210 7210L65
Contextual Info: IDT7210L 16 x 16 PARALLEL CMOS MULTIPLIER ACCUMULATOR COMMERCIAL TEMPERATURE RANGE 16-BIT PARALLEL CMOS MULTIPLIER-ACCUMULATOR IDT7210L FEATURES: featuring individual input and output registers with clocked D-type flip-flop, - 16 x 16 parallel multiplier-accumulator with selectable accumulation and a preload capability which enables input data to be preloaded into the output

binary multiplier Vhdl code

Abstract: 4 bit binary multiplier Vhdl code MULT18X18SIO XC5VLX30-FF676 binary multiplier Verilog code DSP48E 8 bit unsigned multiplier using vhdl code DSP48 vhdl code for 18x18 SIGNED MULTIPLIER types of multipliers
Contextual Info: Multiplier v10.0 DS255 April 2, 2007 Product Specification Introduction LogiCORE Facts The LogiCORE Multiplier core can be configured in either of the following architectures: • Parallel: The multiplier accepts inputs on buses A and B and generates the product of these two

Contextual Info: ANALOG DEVICES High Speed 64-Bit IEEE Floating-Point Multiplier _ ADSP-3210 1.1 Scope. This specification covers the detail requirements for a CMOS monolithic 32-bit and 64-bit IEEE Standard 754 format floating-point multiplier.

LMA1009

Abstract: TDC1009 TMC2009
Contextual Info: LMA 1009/2009 LMA1009/2009 DEVICES INCORPORATED 12 x 12-bit Multiplier-Accumulator 12 x 12-bit Multiplier-Accumulator DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 20 ns Multiply-Accumulate Time ❑ Low Power CMOS Technology ❑ Replaces Fairchild TDC1009/

CY7C510

Abstract: LMA1010 LMA2010 TMC2210 LMA1010GMB55 LMA1010GMB LMA2010JC-55 LMA1010GMB40 CERAMIC CHIP CARRIER LCC 68 socket LMA2010JC-25
Contextual Info: LMA1010/2010 LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator 16 x 16-bit Multiplier-Accumulator DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 20 ns Multiply-Accumulate Time ❑ Replaces TRW TMC2210, Cypress CY7C510, IDT 7210L, and AMD

Contextual Info: LF2250 12 x 10-bit Matrix Multiplier DEVICES INCORPORATED - I FEATURES □ 40 MHz Data and Computation Rate □ Nine Multiplier Array with 12-bit Data and 10-bit Coefficient Inputs □ Separate 16-bit Cascade Input and

binary multiplier gf Vhdl code

Abstract: 8 bit binary numbers multiplication picoblaze galois field theory binary multiplier Vhdl code 4 bit binary multiplier Vhdl code gf multiplier program gf multiplier vhdl program XAPP371 galois xapp373
Contextual Info: Application Note: CoolRunner-II CPLDs R CoolRunner-II CPLD Galois Field GF 2m Multiplier XAPP371 (v1.0) September 26, 2003 Summary This application note outlines three Galois multiplier solutions of increasing bit-length and complexity, stepping through generation and verification processes.

LMU217JC45

Abstract: LMU217JC35 CY7C517 LMU217 LMU217JC55 LMU217JC65
Contextual Info: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 20 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517

CY7C517

Abstract: LMU217 LMU217JC25 LMU217JC35
Contextual Info: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 25 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517

CY7C510

Abstract: LMA1010 LMA2010 TMC2210 LMA1010GMB LMA2010JC-25
Contextual Info: LMA1010/2010 LMA1010/2010 DEVICES INCORPORATED 16 x 16-bit Multiplier-Accumulator 16 x 16-bit Multiplier-Accumulator DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 20 ns Multiply-Accumulate Time ❑ Replaces Fairchild TMC2210, Cypress CY7C510, IDT 7210L, and AMD Am29510

Contextual Info: FAST 74F784 Signetics Multiplier 8-Bit Serial/Parallel Multiplier With Adder/Subtracter Preliminary Specification FAST Products FEATURES • Serial (n x 8)-bit multiplication • Final stage adder/subtracter for optional use in adding a B bit to obtain S±B.

TMC2208

Abstract: LMA1008DMB50 LMA1008JC20 LMA1008JC40 LMA1008PC20 LMA1008PC40
Contextual Info: LMA1008 LMA1008 DEVICES INCORPORATED 8 x 8-bit Multiplier-Accumulator 8 x 8-bit Multiplier-Accumulator DEVICES INCORPORATED FEATURES ❑ ❑ ❑ ❑ ❑ ❑ ❑ ❑ ❑ DESCRIPTION 20 ns Multiply-Accumulate Time Low Power CMOS Technology Replaces Raytheon TMC2208

LMU112

Abstract: LMU112JC25 LMU112JC50 LMU112PC25 LMU112PC50 MPY112K
Contextual Info: LMU112 LMU112 DEVICES INCORPORATED 12 x 12-bit Parallel Multiplier 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES ❑ ❑ ❑ ❑ 25 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces Fairchild MPY112K Two’s Complement or Unsigned