MONOLITHIC MEMORIES PROM Search Results

Monolithic Memories

Abstract: PLE5P16 PLE6P16 Monolithic Memories PROM programming MONOLITHIC MEMORIES PROM
Contextual Info: KHI Monolithic PLE5P16 PLE6P16 Programmable Logic Element Family REVISED Memories / / / / / ////////////////////////////////////////ADVANCE INFORMATION Features/ Benefits Typical Applications • Programmable replacement lor conventional TTL logic • Address decoding

application of programmable array logic

Contextual Info: Basic Design with PLDs Advanced Micro Devices INTRODUCTION The Programmable Array Logic device, commonly known as the PAL device, was invented at Monolithic Memories in 1978. The concept for this revolutionary type of device sprang forth as a simple solution to the

block diagram 8x8 booth multiplier

Abstract: 25S558 comparison between intel 8086 and Zilog 80 microprocessor mPD7720 intel 8087 74S508 74S556 8x8 booth multiplier 67558-1 25S557
Contextual Info: Five New Ways to Go Forth and Multiply Chuck Hastings Our Multiplier Population Explosion Recently it has seemed as if every time you turned around Monolithic Memories was announcing another new multiplier. Want to catch your breath, and find out where each of these fits

16X4/A4

Abstract: pal20s PAL20S10 pal8l14 PAL20RS8 S/PAL16A4 PAL8L14A
Contextual Info: MONOLITHIC MEMORIES INC t.8 t30Bm D QQQ5M“17 5 § D PAL Programmable Array Logic Devices HAL® (Hard Array Logic) Devices Features/Benefits In addition the PALVHAL device provides these options: • Reduces SSI/M SI chip count greater than 5 to 1 • Variable input/output pin ratio

9P4M

Abstract: 10P4M 12P4M 12p8 PLE5P8 PLE8P8 8p4c t461 PLE5P8A
Contextual Info: MONOLITHIC MEMORIES INC tfl » e J b3D3mO □ OOS'tkS 3 f D r-'W ’ Programmable Logic Element PLE Circuit Fam ily Ordering Information Features/Benefits PLE5P8 A C N STD • Programmable replacement for conventional TTL logic TZPR O C ESSIN G T • Reduces 1C inventories and simplities their control

wf vqc 10d

Abstract: TGS 2201 SMD W2T TRANSISTOR SMD W2T 72 EX5962 MMI PAL14L8 C57401j tms 6011 MIMI Ti PROM programming procedure w2t smd
Contextual Info: 2 Specialty Memory Products 1988 Data Book Advanced Micro Devices Monolithic ryisn Memories UliTlU A W h o lly O w n e d S u b s id ia ry o f A d v a n c e d M ic r o D e vice s a Advanced Micro Devices Sp ecialty Memory Products Data Book/Handbook Introduction

1024x8 PROM

Contextual Info: c, MmoHMb m Memories High Performance 1024x8 PROM 5 3 /6 3 S 8 8 0 5 3 /6 3 S 8 8 1 5 3 /6 3 S 8 8 1 A / / / / / / / / / ////////////////////////////////////A DVA NCE INFORMATION Features/ Benefits Applications • 8192-blt memory • Microprogram control stores

Monolithic Memories

Abstract: S485A 512x8 53S485 63S485 63S841
Contextual Info: High Performance 512x8 PROM TiW PROM Fam ily 5 3 /6 3 S 4 8 5 Features/Benefits Description • Upward pinout-compatible with higher density PROMs The 53S485 and 63S485 are 512x8 bipolar PROMs featuring low current PNP inputs, full Schottky clam ping, and three-state

generic prom programming

Abstract: 256x8 Monolithic Memories PROM programming
Contextual Info: High Performance 25 6x 8 PROM TiW PROM Family 63S285 Features/ Benefits Description • Replaces 24-pin 256x8 NiCr PROM 6336 The 63S285 is a 256x8 bipolar PROM featuring low-current PNP inputs, full Schottky clamping, and three-state outputs. The titanium-tungsten fuses store a logical low and are programmed

Contextual Info: High Performance 5 1 2 x 8 PROM TiW PROM Family 5 3 /6 3 S 4 8 0 5 3 /6 3 S 4 8 1 5 3 /6 3 S 4 8 1 A Features/ Benefits Description • 30 ns maximum access time The 53/63S480 and 53/63S481/A are 512x8 bipolar PROMs featuring low input current PNP inputs, full Schottky clamping,

Monolithic Memories PROM programming

Abstract: 512X8 53S485 63S485 generic prom programming
Contextual Info: High Perform ance 512x8 PROM TiW PROM Fam ily 5 3 /6 3 S 4 8 5 CSS485 Features/ Benefits Description • Upward pinout-compatible with higher density PROMs The 53S485 and 63S485 are 512x8 bipolar PRO M s featuring low current PNP inputs, full Schottky clamping, and three-state

Monolithic Memories PROM programming

Abstract: 63S1681
Contextual Info: High Perform ance 2 0 4 8 x 8 PROM TiW PROM Fam ily 53/63S 1681 5 3 /6 3 S 1 6 8 1 A Features/ Benefits Description • 35 n# maximum access time The 53/63S1681 is a high-speed 2Kx8 PROM which uses industry standard package and pin out. In addition, the device is

128x128

Abstract: 63S1641 53S1641 53S1641A 63S1641A
Contextual Info: High Performance 4096x4 PROM TiW PROM Fam ily 53/63S1641 53/63S1641A Features/Benefits Description • 35-ns maximum access time The 53/63S1641 features low input current PNP inputs, full Schottky clamping and three-state outputs. The titaniumtungsten fuses store a logical low and are programmed to the

63S1681

Abstract: monolithic memories 53S1681 63S1681A 2048x8 53S1681A Monolithic Memories PROM programming
Contextual Info: High Performance 2 0 4 8 x 8 PROM TiW PROM Fam ily 53 /63S 1681 5 3 /6 3 S 1 6 8 1 A Features/Benefits Description • 35-ns maximum access time The 53/63S1681 is a high-speed 2Kx8 PROM which uses industry standard package and pin out. In addition, the device is

1024X4

Abstract: 53S440 53S441 53S441A 63S440 63S441 63S441A 63S481
Contextual Info: High Performance 1 0 2 4 x 4 PROM TiW PROM Family 5 3 /6 3 S 4 4 0 5 3 /6 3 S 4 4 1 5 3 /6 3 S 4 4 1 A Features/ Benefits Description • 35-ns maximum access time The 53/63S440 and 53/63S441/A are 1024x4 bipolar PROMs featuring low input current PNP inputs, full Schottky clamping

MMI 6309

Abstract: mmi 5349-1 MMI 63xx 6309-1 mmi 6349-1 6308 prom 6341 prom
Contextual Info: Generic NiCR PROM Fam ily 5 3 /6 3 X X -1 5 3 /6 3 X X -2 Features/Benefits Description • From 2048-bit to 8192-bit memory The 53/63XX series generic PROM fam ily offers a wide selection of size and organizations. The 8-bit wide PROMs range from 256x8 to 1024x8 in a wide selection of package sizes including the

53DA441

Abstract: 53DA442 63DA441 63DA442 D442 Monolithic Memories PROM programming MONOLITHIC MEMORIES PROM
Contextual Info: 1 0 2 4 x 4 Diagnostic Registered PROM 5 3 /6 3 D A 4 4 1 5 3 /6 3 D A 4 4 2 Enables and Output Initialization Features/Benefits • Programmable asynchronous output initialization • Three-state outputs with two enables • Provides system diagnostic testing with system

Contextual Info: 2048x8 Registered PROM 5 3 /6 3 R A 1 6 8 1 5 3 /6 3 R A 1 6 8 1 A ^ j w ith Asynchronous Enable Features/ Benefits Description • Synchronous output enable The 53/63RA1681 and 53/63RA1681A are 2Kx8 PROMs with on-chip “ D''-type registers. O utput enable control through an

1024x4

Abstract: 1024X4 prom tS1820 53S441 63S441A 53S440 53S441A 63S440 63S441 generic prom programming
Contextual Info: High Performance 1 0 2 4 x 4 PROM TiW PROM Family 5 3 /6 3 S 4 4 0 5 3 /6 3 S 4 4 1 5 3 /6 3 S 4 4 1 A Features/ Benefits Description • 35-ns maximum access time The 53/63S440 and 53/63S441/A are 1024x4 bipolar PROMs featuring low input current PNP inputs, full Schottky clamping

53RS1681A

Abstract: 53DA1643 53RS1681 63RS1681 63RS1681A
Contextual Info: 2048x8 Registered PROM 5 3 /6 3 R S 1 6 8 1 5 3 /6 3 R S 1 6 8 1 A with Synchronous Enable Features/Benefits Description • Synchronous output enable The 53/63RS1681 and 53/63RS1681A are 2Kx8 PROMs w ith on -chip “ D” type registers, versatile output enable control

MONOLITHIC MEMORIES PROM

Contextual Info: 40 9 6 x 4 Diagnostic. h ,/w Registered PROM ^ 53D 1641 63D 1641 Asynchronous Enable Patent Pending Features/ Benefits Description • Asynchronous output enable The 53/63D1641 is a 4Kx4 PROM with registered three-state outputs and a shadow register for diagnostic capabilities.

63S881

Abstract: 53S881 53S881A 63S881A 1024x8 PROM
Contextual Info: High Performance 1 0 2 4 x 8 PROM TiW PROM Family 5 3 /6 3 S 8 8 1 5 3 /6 3 S 8 8 1 A Features/Benefits Description • 30-ns maximum access time The 53/63S881 and 53/63S881A are 1024x8 bipolar PROMs featuring low inpu t current PNP inputs, full S chottky clam ping,

generic prom programming

Abstract: 63S1641A metal mask layout
Contextual Info: High Perform ance 4 0 9 6 x 4 PROM TiW PROM Fam ily 5 3 /6 3 S 1 6 4 1 5 3 /6 3 S 1 641A Features/ Benefits Description • 35 ns maximum access time The 53/63S1641 features low input current PNP inputs, full Schottky clamping and three-state outputs. The titaniumtungsten fuses store a logical low and are programmed to the

74S450

Abstract: KU16 74s2708
Contextual Info: The Engineering Staff of TEXAS INSTRUMENTS INCORPORATED Sem iconductor Group Bipolar Memory Data Manual S EPT EM BER 1977 T exas In s t r u m e n t s ? 7 SCH O TTKYf SERIES 54S/74S PROGRAMMABLE READ-ONLY MEMORIES PROMS Choice of Three-State or Open Collector