MNA165 Search Results
MNA165 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
74LVC1G32
Abstract: 74LVC1G32GV 74LVC1G32GW JESD87
|
Original |
74lvc1g32jesd8b/jesd36sca74613508/02/pp16+3 | |
74LVC1G02
Abstract: 74LVC1G02GV 74LVC1G02GW sot75
|
Original |
74lvc1g02jesd8b/jesd36sca74613508/03/pp16+3 | |
|
Contextual Info: 74AUP1G32-Q100 Low-power 2-input OR-gate Rev. 2 — 4 July 2013 Product data sheet 1. General description The 74AUP1G32-Q100 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
Original |
74aup1g32-q10074aup1g32 | |
|
Contextual Info: 74AUP1G02 Low-power 2-input NOR gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. |
Original |
74aup1g02 | |
|
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC1G32 Single 2-input OR gate Product specification Supersedes data of 2000 Nov 22 2001 May 21 Philips Semiconductors Product specification Single 2-input OR gate 74LVC1G32 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 5.5 V |
Original |
74lvc1g32jesd8b/jesd36sca74613508/02/pp16 | |
74AUP1G32
Abstract: 74AUP1G32GF 74AUP1G32GM 74AUP1G32GW JESD22-A114-C MO-203
|
Original |
74aup1g3274aup1g32gf74aup1g32gm74aup1g32gw+2 | |
AHCT1G32
Abstract: SOT753 74AHC1G32 74AHC1G32GV 74AHC1G32GW 74AHCT1G32 74AHCT1G32GV 74AHCT1G32GW JESD22-A114E
|
Original |
74ahc1g3274ahct1g32jesd22-a114ejesd22-a115-a+9 | |
|
Contextual Info: 74AUP1G02 Low-power 2-input NOR gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. |
Original |
74aup1g02 | |
74LVC1G32
Abstract: 74LVC1G32GM 74LVC1G32GV 74LVC1G32GW
|
Original |
74lvc1g32jesd8b/jesd36sca76r20/04/pp14+3 | |
74HC1G32GW
Abstract: 74HC1G32 74HC 74HC1G32GV 74HC32 74HCT1G32 74HCT1G32GV 74HCT1G32GW 74HCT32
|
Original |
74hc1g3274hct1g3274hc3274hct32+8 | |
|
Contextual Info: 74AUP1G02 Low-power 2-input NOR gate Rev. 4 — 15 November 2011 Product data sheet 1. General description The 74AUP1G02 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
Original |
74aup1g02 | |
|
Contextual Info: 74LVC1G32 Single 2-input OR gate Rev. 8 — 6 December 2011 Product data sheet 1. General description The 74LVC1G32 provides one 2-input OR function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. |
Original |
74lvc1g32 | |
|
Contextual Info: 74AUP1G32 Low-power 2-input OR-gate Rev. 4 — 23 November 2011 Product data sheet 1. General description The 74AUP1G32 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. |
Original |
74aup1g32 | |
|
Contextual Info: 74AHC1G32-Q100; 74AHCT1G32-Q100 2-input OR gate Rev. 1 — 11 July 2012 Product data sheet 1. General description 74AHC1G32-Q100 and 74AHCT1G32-Q100 are high-speed Si-gate CMOS devices. They provide a 2-input OR function. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. |
Original |
74ahc1g32-q10074ahct1g32-q100aec-q100ahct1g32 | |
|
|
|||
MNA103
Abstract: 74LVC1G02 74LVC1G02GM 74LVC1G02GV 74LVC1G02GW
|
Original |
74lvc1g02jesd8b/jesd36sca76r20/05/pp14+4 | |
JESD22-A114E
Abstract: sot753 marking 13 diode MARKING CODE CG 74AHC1G32GV 74AHC1G32GW marking A32 74AHC1G32 74AHCT1G32 74AHCT1G32GV 74AHCT1G32GW
|
Original |
74ahc1g3274ahct1g32jesd22-a114ejesd22-a115-a+11 | |
74AUC1G32
Abstract: 74AUC1G32GW
|
Original |
74auc1g3274auc1g32gw | |
VM MARKING CODE SOT353
Abstract: hct1g32
|
Original |
74hc1g3274hct1g3274hc3274hct32+6 | |
74LVC1G32
Abstract: 74LVC1G32GF 74LVC1G32GM 74LVC1G32GV 74LVC1G32GW
|
Original |
74lvc1g3274lvc1g32gf74lvc1g32gm74lvc1g32gv+1 | |
|
Contextual Info: 74AUP1G32-Q100 Low-power 2-input OR-gate Rev. 1 — 20 March 2013 Product data sheet 1. General description The 74AUP1G32-Q100 provides the single 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
Original |
74aup1g32-q10074aup1g32 | |
|
Contextual Info: 74AUP1G02-Q100 Low-power 2-input NOR gate Rev. 1 — 4 June 2014 Product data sheet 1. General description The 74AUP1G02-Q100 provides the single 2-input NOR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
Original |
74aup1g02-q10074aup1g02 | |
74AUP1G32
Abstract: 74AUP1G32GM 74AUP1G32GW JESD22-A114-C MO-203
|
Original |
74aup1g3274aup1g32gm74aup1g32gwjesd22-a114-c+1 | |
sot753
Abstract: sot753 marking 13 JESD22-A114E MO-203
|
Original |
xc7set32jesd22-a114ejesd22-a115-ajesd22-c101c+6 | |
|
Contextual Info: 74LVC1G32 Single 2-input OR gate Rev. 9 — 12 April 2012 Product data sheet 1. General description The 74LVC1G32 provides one 2-input OR function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. |
Original |
74lvc1g32 | |