MITSUBISHI BUFFER GATE NAND Search Results

M74ALS38AP

Abstract: L-1146 L1146 mitsubishi buffer gate nand
Contextual Info: M IT S U B IS H I ALSTTLs M 74A LS 1003A P QUADRUPLE 2-IN P U T POSITIVE NAND BUFFER W ITH OPEN COLLECTOR O U T P U T 6249827 MITSUBISHI CDGTL LOGIC 91D 12714 DESCRIPTION D PIN CONFIGURATION TOP VIEW) The M74ALS1003AP is a semiconductor integrated cir­

Dt3 dual transistor

Abstract: 74ALS22B
Contextual Info: MITSUBISHI -CDGTL LOGIC} Tl Î>Ë D01S3S3 2 MITSUBISHI ALSTTLs M74ALS22BP 6249827 MITSUBISHI D G T L LOGIC) 91D 1 2 3 53 D DUAL 4-INPUT POSITIVE NAND GATE WITH OPEN COLLECTOR OUTPUT -A S - DESCRIPTION PIN CONFIGURATION (TOP VIEW) Th e M 74A LS 22B P is a sem iconductor integrated circuit

m60013

Abstract: M60016 m60011 M60014 z46n M60030 M60024 Z24N M60012 m60043
Contextual Info: A m its u b is h i CMOS GATE ARRAYS ELECTRONIC DEVICE GROUP Mitsubishi CMOS Gate Arrays INTRODUCTION Mitsubishi offers three fami­ lies of CMOS gate arrays: 1.0 /im, 1.3 /j.m, and 2.0 ji.m, with usable gates ranging from 200 to 35,000. The 1.0 and 1.3 p.m devices are

74LS38P

Contextual Info: MITSUBISHI LSTTLs M74LS38P QUADRUPLE 2 -IN P U T P O S IT IV E NAND BUFFER W IT H OPEN COLLECTOR OU TPUT DESCRIPTION The M 74LS 38P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing fo u r 2-input positive N A N D and negative N O R

M74ALS244AP

Abstract: M74AlS244 OCTAL DRIVER HIGH LEVEL OPEN COLLECTOR OUTPUT
Contextual Info: MITSUBISHI íDGTL LOGIC} 6249827 MITSUBISHI dË | ^ 2 4 ^ 0 5 7 D D l S TM b □ MITSUBISHI ALSTTLs M74ALS1244AP CDGTL LO GI C 91D 12746 D OCTAL BUFFER/LINE DRIVER W ITH 3-STATE OUTPUT NONINVERTED) T ' S 2 ~ o 7 DESCRIPTION The M74ALS1244AP is a semiconductor integrated cir­

Contextual Info: MITSUBISHI íDGTL LOGIcTtL ¿il ^54=1027 D015S31 0"T p -* • ■ MITSUBISHI ALSTTLs M 74A LS466A P 7 OCTAL BUFFER W ITH 3-STATE OUTPUT INVERTED 9 1D 12531 6249827 MITSUBISHI CDGTL LOGIC) DESCRIPTION The M74ALS466AP is a semiconductor integrated circuit

DEI 1144

Contextual Info: TÉ | MITSUBISHI -CDGTL L O G I O 0 D 1 2 4 7 CJ MITSUBISHI ALSTTLs * 0 0 M 6249827 MITSUBISHI 7 4 A L S 2 4 4 A <DGTL L O GI C - 1 P 91D 12479 OCTAL BUFFER/LINE DRIVER W IT IÌ 3-STATE OUTPUT NONINVERTED) DESCRIPTION The M 74ALS244A-1P is a sem iconductor integrated cir­

74ALS46

Contextual Info: MITSUBISHI ^ -CDGTL L O G I C } 11 D E | bS^flE? 001252Ö »• ■ —•«•«■»m ab e w i Ä m u s v D ia n i a u i i u ? ^ 0 0 ° G M 7 4 A L S 4 6 5 A P OCTAL BUFFER WITH 3-STATE OUTPUT NONINVERTED 6249827 91D M 1 TSUB I S H T 7 D G f r T 0 G I ^ y _

M74LS38P

Abstract: mitsubishi air conditioning 20-PIN
Contextual Info: MITSUBISHI LSTTLs M74LS38P Q U AD R UPLE 2 -IN P U T P O S IT IV E NAND BUFFER W IT H OPEN COLLECTOR OUTPU T DESCRIPTION PIN CONFIGURATION TOP VIEW The M74LS38P is a semiconductor integrated circu it containing fo u r 2-input positive N AN D and negative NOR

z63n

Abstract: t28000 z65n 07in M6008 mitsubishi lable fr1s MITSUBISHI GATE ARRAY z66n R12W
Contextual Info: A m itsu b ish i ELECTRO N IC DEVICE GROUP P R E LIM IN A R Y M6008X 0.8 Jim CMOS GATE ARRAYS Mitsubishi M6008X Series 0.8 Jim CMOS Gate Arrays INTRODUCTION Mitsubishi offers sub-m icron CMOS Gate Arrays us­ ing a 0.8 micron drawn twin well silicon gate process

74ALS244AP

Abstract: M74ALS244AP
Contextual Info: M ITSUBISHI -CDGTL LOGIC} 11 D E ^ hdHTäd r- UüJjd47b~7 J f~ MITSUBISHI ALSTTLs M 74ALS244AP 6249827 MITSUBISHI DGTL LOGIC 91D 12476 D OCTAL B U F F E R /L IN E D R IVER W IT H 3-S TA TE O U TP U T (N O N IN V E R T E D ) ~ r - S 2 .- o 7 PIN CONFIGURATION (TOP VIEW)

1034P

Abstract: M74ALS257dp
Contextual Info: MITSUBISHI ALSTTLs M 74A LS1034P MITSUB ISH I ÍDGTL LOGIC} =11 de| G[]i.E7 3a b~|~~ HEX D R IVER DESCRIPTION PIN CONFIGURATION TOP VIEW The M74ALS1034P is a sem iconductor integrated cir­ cuit consisting of six non-inverting drivers. INPUT 1A —[T FEATURES

Contextual Info: MITSUBISHI ALSTTLs _ . M MI TSU BISHI -CDGTL LOGIC} 7 4 A L S I Q lit! DEl bdnocc U Duìcvià â P h flT~ HEX INVERTING BUFFER W ITH OPEN COLLECTOR OUTPUT 7 ^ DESCRIPTION / 3 - / ^ PIN CONFIGURATION TOP VIEW Th e M 7 4 A L S 1 0 0 5 P is a s e m ic o n d u c to r in te g ra te d c ir­

LS468A

Abstract: dt-55 X1145
Contextual Info: "ÏËJ bSMTûË? 0015S37 1 MITSUBISHI -CDGTL LOGIC} MITSUBISHI ALSTTLs ,V C ^ M 74A LS468A P T -S 2 -0 7 OCTAL BUFFER WITH 3-STATE OUTPUT INVERTED) it s * * 6 24 9 8 2 7 M IT SU BIS HI 9 1D <DGTL LOGIC) DESCRIPTION The M74ALS468AP is a semiconductor integrated circuit

L1146

Abstract: 74ALS1004
Contextual Info: MITSUBISHI ALSTTLs M 74ALS1004P MITSUBI SHI ÍDGTL LOGIC} TI d e J a a ia ? ib i | ~ HEX IN V E R TIN G DR IVER 7^ y j ' / r DESCRIPTION PIN CONFIGURATION TOP VIEW The M 74ALS1004P is a sem iconductor integrated cir­ cuit consistning of six buffers with inverted outputs.

ATS 1144

Contextual Info: MITSUBISHI {DGTL LOGIO 11 De| tSMIöa? ODISSM 8 I a>/ MITSUBISHI ALSTTLs 0 ^ 3 ^ M 74A LS S 21P 7 * y s - / 7 8 -B IT M AG NITU DE COMPARATOR | t'o 's e » """ so'*'6 6 2 4 9 8 2 7 M IT S U B IS H I <DG TL 9 1 D L O G IC DESCRIPTION The M 74ALS521P is a sem iconductor integrated circuit

00155L

Contextual Info: .^ 0«° M 74 ALS 534 P " 7 ^ ^ -O *7'¿ » S ' MITSUBISHI ALSTTLs OCTAL D-TYPE EDGE-TRIGGERED FLIP FLOP W ITH 3-STATE OUTPUT INVERTED _ 624982 7 MITSUBISHI <DGTL LOGIC) DESCRIPTION 91D 12559 D PIN CONFIGURATION (TOP VIEW) The M74ALS534P is a semiconductor intergrated circuit

M74ALS09

Abstract: M74ALS74 dd127 M74ALS257 M74ALS05 m74als32 m74als561 m74als245 20P2V M74ALS04
Contextual Info: MITSUBISHI íDGTL L0GIC3- TI ]>ËÏ bSMTBE? 0 0 i a 4 3 c] 1 T • ■ MITSUBISHI ALSTTLs M74ALS175P ”6 2 4 9 8 2 / MITSUBISHI DGTL LOGIC 91D 1 2 43 9 D QUADRUPLE D-TYPE FLIP FLOP W ITH RESET DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M 74ALS175P is a sem iconductor integrated circuit

hEX INVERTER

Abstract: lm cata data
Contextual Info: MITSUBISHI O G T L LCCICl TI ÏeJ t a w a s ? üoiasi t a MITSUBISHI ALSTTLs M74ALS520P - 7 ^ V 5 - '7 .*£«* • 8-B IT MAGNITUDE COMPARATOR Ü3249827 MITSUBISHI CDQTL LOGIC 9 1D 12546 DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M74ALS520P is a semiconductor integrated circuit

74ALS576

Contextual Info: -O S ' & MITSUBISHI ALSTTLs M 74A LS 576A P o80 Í < ° o ^ <'96 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOP 3AÍITH 3-STATE OUTPUT INVERTED » S * ’ “'* 6249827 MITSUBISHI CDGTL LO GI C) DESCRIPTION 9 1D 12604 D PIN CONFIGURATION (TOP VIEW) OUTPUT CONTROL 'oc - E

l54c

Abstract: DT070
Contextual Info: MITSUBISHI ÍDGTL LOGIC} "il Ï Ë | ^24^027 0012303 O j ~ MITSUBISHI ALSTTLs M 7 4 A L S 1 1 4 A P T “ 9 6 > ’O t7 ~ O t7 • _ DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP-FLOP W ITH SET. COMMON RESET AND COMMON CLOCK 6249827 MITSUBISHI CDGTL LOGIC DESCRIPTION

74ALS644

Abstract: 9020 8-pin SOP 74ALS643
Contextual Info: MITSUBISHI -CDGTL LOGICI TI T È I t .2 4 T ñ 5 V Q Q l^ m i 1 M IT S U B IS H I ALSTTLs M 74A L S 644A P 624 98 27 MITSU BIS HI CDGTL LOGIC .910 12649 D '_ OCTAL BUS TRANSCEIVER W ITH OPEN COLLECTOR OUTPUT - T DESCRIPTION ^ S X i- 3 / PIN CONFIGURATION TOP VIEW)

Contextual Info: M IT SU BI S HI O G TL LOGIC} TI ]>e | b E4 c1äS7 0D12377 S jp MITSUBISHI ALSTTLs M 6249827 MITSUBISHI I 7 4 A L S 1 1 2 A P <DGTL LOGIC 91D 12377 D DUAL J-K N EG A TIVE EDGE-TRIGGERED FLIP-FLO P W IT H SET AND RESET - - DESCRIPTION The M 74ALS112AP is a semiconductor integrated circuit

Contextual Info: MITSUBISHI -CDGTL LOGIC} Tl Î>ÊÏ h2M1ÛE7 00l24Tfi □ T MITSUBISHI ALSTTLs M74ALS258P ^ QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER W ITH 3-STATE OUTPUT (INVERTED 6249827 MITSUBISHI 9 1D 12498 CDGTL LOGIC) DESCRIPTION The M 74ALS258P is a sem iconductor integrated cir­