MILSTD883C Search Results

Contextual Info: SEMICONDUCTOR PG03DXTEV TECHNICAL DATA TVS Diode Array for ESD Protection in Portable Electronics Protection in Portable Electronics Applications. FEATURES ・ESD Protection: IEC 61000-4-2 Level 4. MILSTD883C-Method 3015-6:Class 3 ・Four separate unidirectional configurations for protection

Contextual Info: TLC339M, TLC339I, TLC339C QUADRUPLE MICROPOWER LinCMOS COMPARATORS D3135, DECEMBER 1986-R EV ISED FEBRUARY 1989 • Very Low Power. . . 200 jjiW Typ at 5 V T LC 339M . . . J PACKAGE TLC339I. TLC339C . . . D. J, OR N PACKAGE • Fast Response Time . . . 2.5 |xs Typ with

Contextual Info: SN74LVC540 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 • Space-Saving Package Option: Shrink Small-Outline Package DB Features EIAJ 0.65-mm Lead Pitch DB, DW, OR PW PACKAGE (TOP VIEW) • EPIC (Enhanced-Performance implanted CMOS) Submicron Process

K2545

Abstract: cx 2808 tlc2652 TLC2652A D3157
Contextual Info: TLC2652, TLC2652A Advanced LinCMOS1 PRECISION CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS D3157, SEPTEMBER 1988 0008, JG, or P PACKAGE Extremely Low Offset Voltage . . 1 nV Max TOP VIEW Extremely Low Change in Offset Voltage with Temperature . . . 0.003nV/°CTyp

wc 2c

Contextual Info: SMJ4416 16.384-WORD BY 4-BIT DYNAMIC RAM AUGUST 1980 JO PACKAGE 1 6 ,3 8 4 x 4 O rg anizatio n TO P V IE W S ingle 5 -V S u p p ly ( ± 1 0 % T olerance) g P erfo rm a nce Ranges ACCESS T IM E • DQ1 C C2 DQ 2C Ul8 Dvss 17 3 D Q 4 3 16 4 15 "2C A S "2D Q 3

CO2V

Contextual Info: SN74ALVC16600 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE TOP VIEW ÖEÄE [ LEAB [ A1 [ GND [ A2 [ A3 [ EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process

Contextual Info: SN54BCT2828B, SN74BCT2828B 10-BIT BUS/MOS MEMORY DRIVERS WITH 3-STATE INVERTING OUTPUTS _ D3635, SEPTEMBER 1990 S N 54B C T282B B . . . J T P A C K A G E BiCMOS Design Substantially Reduces S N 7 4B C T 28 2 8B . . . D W O R N T P A C K A G E

ABT16374A

Contextual Info: SN54ABT16374A, SN74ABT16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS MARCH 1993-R EV IS ED JULY 1993 Members of the Texas Instruments Widebus Family State-of-the-Art EPIC-HB" BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per

Contextual Info: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS M ARCH 1993 OB, DW, OR PW PACKAGE TOP VIEW • Space-Saving Package Option: Shrink Small-Outline Package (DB) Features EIAJ 0.65-mm Lead Pitch • EPIC (Enhanced-Performance Implanted

27C510

Abstract: pc51020 SMJ27C510 pc510-20
Contextual Info: TMS27C510 524 288-BIT ERASABLE PROGRAMMABLE READ-ONLY MEMORY TMS27PC510 524 288-BIT PROGRAMMABLE READ-ONLY MEMORY SMLS51OA-AUGUST 1990-REVISED JANUARY 1993 J AND N PACKAGESÎ TOP VIEW Organization . . . 64K x 8 Single 5-V Power Supply V pp [ Pin Compatible With Existing 1 Meg MOS

SN54LV14

Abstract: 2020CN
Contextual Info: SN54LV14, SN74LV14 HEX SCHMITT-TRIGGER INVERTERS _ S C L S 1 8 7 B - FEBRUARY 1 9 9 3 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-|i Process SN54LV14 . . . J OR W PACKAGE SN74LV14. . . D, DB, OR PW PACKAGE (TOP VIEW) TVplcal V q l p (Output Ground Bounce)

Contextual Info: SN74LVC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET JANUARY 1993 D, DB, OR PW PACKAGE TOP VIEW • EPIC (Enhanced-Performance Implanted 1CCR [ 1 1D [ 2 CMOS) Submicron Process • 1CLK [ 3 Designed to Facilitate Incident Wave

Contextual Info: SN54LVU04, SN74LVU04 HEX INVERTERS S C L S 1 B 5 B - FEBRUARY 1993 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-n Process Typical V q l p (Output Ground Bounce) < 0.8 V at V c c . Ta = 25°C Typical V q h v (Output V q h Undershoot)

Contextual Info: TLC193 TLC393 DUAL MICROPOWER LinCMOS VOLTAGE COMPARATOR SLCS115D - DECEMBER 1986 - REVISED JANUARY 1999 Very Low Power . . . 110 ,uW Typ at 5 V D, JG, P, OR PW PACKAGE TOP VIEW Fast Response Time . . . tp|_n = 2.5 jas Typ With 5-mV Overdrive Single Supply Operation:

Contextual Info: SN74ALVC16601 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS JANUARY 1993 DGG OR DL PACKAGE TOP VIEW UBT (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Mode

Contextual Info: SN54HCT125, SN74HCT125 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS069S- NOVEMBER 198« - REVISED MARCH 1996 • ■ I • • Inputs Are TTL-Voltage Compatible High-Current 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers I I •

Contextual Info: SN54LV138, SN74LV138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SC LS190P- FEBRUARY 19 9 3 - REVISED JULY 1996 EPIC Enhanced-Performance Implanted CMOS 2-fi Process Typical Vqlp (Output Ground Bounce) < 0.8 V at Vc c , Ta = 25°C SN54LV138. . . J OR W PACKAGE

A910D

Contextual Info: SN74LVC863 9-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS MARCH 1993 • Space-Saving Package Option: Shrink Small-Outline Package DB Features EIAJ 0.65-mm Lead Pitch • EPIC (Enhanced-Performance Implanted CMOS) Submicron Process • Designed to Facilitate Incident Wave

tms jl 27C256-15

Abstract: tms jl 27c256-12 tms jl 27C256-10 TMS JL 27C256-20 TMS JE 27C256-15
Contextual Info: TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES _ SMLS25BH- SEPTEMBER 1964 - REVISED NOVEMSER 1997 Organization . . . 32768 by 8 Bits J PACKAGE TO P VIEW Single 5-V Power Supply Pin Compatible With Existing 256K MOS

Contextual Info: SN74LVC157 QUADRUPLE 2-LINE TO 1-UNE DATA SELECTOR/MULTIPLEXER SCAS292B-JANUARY 19 9 3 - REVISED JULY 1995 I • EPIC Enhanced-Performance Implanted CMOS Submicron Process • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model

Contextual Info: SN54AHCU04, SN74AHCU04 HEX INVERTERS SCLS234A - OCTOBER 1995 - REVISED MARCH 1996 SN54AHCU04 . . . J OR W PACKAGE SN74AHCU04. . . D, DB, N OR PW PACKAGE TOP VIEW Operating Range 2-V to 5.5-V V^c EPIC (Enhanced-Performance Implanted CMOS) Process Unbuffered Outputs

9262E

Contextual Info: SMJ27C256 262 144-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY SGMS005D-MAY 1986-REVISED FEBRUARY 1993 Military Operating Temperature Range . . . - 55°C to 125°C J P A C K A G ET T O P V IE W MIL-STD-883C Class B High-Reliabillity Processing Organization . . . 32K

tlc3702

Abstract: picoammeter schematic diagram
Contextual Info: TLC3702 DUAL MICROPOWER LinCMOS VOLTAGE COMPARATORS SLCS013D - NOVEMBER 1986 - REVISED NOVEMBER 1998 • Push-Pull CMOS Output Drives Capacitive Loads Without Pullup Resistor, • Very Low Power . . . 100 |iW Typ at 5 V • Fast Response Time . . . tp m = 2.7 us Typ

Contextual Info: SN54LVT273, SN74LVT273 3.3-V ABT OCTAL D-TYPE FLIP-FLOPS WITH CLEAR I SCBS130E - MAY 1992 - REVISED JULY 1995 State-of-the-Art Advanced BICMOS Technology ABT Design for 3.3-V Operation and Low-Static Power Dissipation Support Mixed-Mode Signal Operation (5-V