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Festo


Festo NPHS-S6-M-G38 (8059259) COUPLING PLUG, PNEU, 10 BAR, G3/8 MALE THRD
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
RS	NPHS-S6-M-G38 (8059259)	Bulk	6		1	1 $7.64 10 $7.64 100 $7.64 1000 $7.64 10000 $7.64	Buy Now
Festo NPHS-D6-M-G38 (8059276) COUPLING SOCKET, PNEU, 20 BAR, 2050 L/MIN, G3/8 MALE THRD
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
RS	NPHS-D6-M-G38 (8059276)	Bulk			1	1 $68.18 10 $68.18 100 $68.18 1000 $68.18 10000 $68.18	Get Quote
Festo VUWS-LT30-M52-M-G38 (8096576) VALVE, PNEU ACTUATED, POPPET, 5/2 MONOSTABLE, INLINE, G3/8, SZ 30
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
RS	VUWS-LT30-M52-M-G38 (8096576)	Bulk			1	1 $111.70 10 $111.70 100 $111.70 1000 $111.70 10000 $111.70	Get Quote
Festo VUWS-LT30-T32H-M-G38 (8036720) VALVE, PNEU ACTUATED, POPPET, 2X3/2 NC/NO, INLINE, G3/8, SZ 30
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
RS	VUWS-LT30-T32H-M-G38 (8036720)	Bulk			1	1 $116.35 10 $116.35 100 $116.35 1000 $116.35 10000 $116.35	Get Quote
Festo VUWS-LT30-M32C-M-G38 (8096574) VALVE, PNEU ACTUATED, POPPET, 3/2 NC, INLINE, G3/8, SZ 30
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
RS	VUWS-LT30-M32C-M-G38 (8096574)	Bulk			1	1 $93.08 10 $93.08 100 $93.08 1000 $93.08 10000 $93.08	Get Quote

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MG388 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: Delta39K ISR™ CPLD Family CPLDs at FPGA Densities™ Features • Carry-chain logic for fast and efficient arithmetic operations • Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+	Original	delta39k 64-bit 39k200-208eqfp 39k165 +439k200 -233mhz delta39k165z 144-fbga	PDF
84 FBGA Abstract: 39K100 39K200 39K30 39K50 388-BGA Contextual Info: Delta39K ISR™ CPLD Family CPLDs at FPGA Densities™ Features • Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+ • Compatible with NOBL™, ZBT™, and QDR™ SRAMs	Original	delta39ktm 66-mhz 64-bit 39k165 +9208-eqfp 484-fbga 388-bga 676-fbga 84 fbga 39k100 39k200 39k30 39k50	PDF
8kx1 RAM Contextual Info: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ Features • Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+ • Compatible with NOBL™, ZBT™, and QDR™ SRAMs	Original	delta39ktm 233-mhz mil-std-883 /jesd22a114-a +739k50 39k30 delta39k 39k165/200 cy3lv002 cy3lv020 8kx1 ram	PDF
39k200 Abstract: CY39200V Contextual Info: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ Features •Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+ •Compatible with NOBL™, ZBT™, and QDR™ SRAMs	Original	delta39ktm 250-mhz 39k200 cy39200v	PDF
CY39100V484B-125BBI Abstract: programmable slew rate control IO AT17LV010-10JI CY39030V256-125MBC IO1 5V 39K100 39K165 39K30 39K50 CY39100V208B-125NTC Contextual Info: Delta39K ISR™ CPLD Family CPLDs at FPGA Densities™ Features • Carry-chain logic for fast and efficient arithmetic operations • Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+	Original	delta39ktm 66-mhz 64-bit 39k165 +12mg388 cy39030 -256fbga cy39100v484b-125bbi programmable slew rate control io at17lv010-10ji cy39030v256-125mbc io1 5v 39k100 39k30 39k50 cy39100v208b-125ntc	PDF
39K100 Abstract: 39K30 39K50 Contextual Info: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ Features — Clock polarity control at each register • Carry-chain logic for fast and efficient arithmetic operations • Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2	Original	delta39ktm 64-bit 39k200-208eqfp 39k165 +639k200 -233mhz delta39k165z 39k100 39k30 39k50	PDF
CY39200V Contextual Info: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ •Multiple I/O standards supported — LVCMOS, LVTTL, 3.3V PCI, SSTL2 I-II , SSTL3 (I-II), HSTL (I-IV), and GTL+ •Compatible with NOBL™, ZBT™, and QDR™ SRAMs •Programmable slew rate control on each I/O pin	Original	delta39ktm nt208 51-85069-b 388-lead +5mg388 256-ball bb256/mb256 1-85108-a cy39200v	PDF
delta39k Abstract: 39K100 39K30 39K50 Contextual Info: Delta39K ISR™ CPLD Family CPLDs at FPGA Densities™ Features • Carry-chain logic for fast and efficient arithmetic operations • Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+	Original	delta39ktm 64-bit 39k165 mg388 +6cy39030 -256fbga delta39k 39k100 39k30 39k50	PDF
delta39k Abstract: 39K100 39K165 39K30 39K50 CY3LV010 CY39200V Contextual Info: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ Features • Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+ • Compatible with NOBL™, ZBT™, and QDR™ SRAMs	Original	delta39ktm 64-bit delta39k 39k165/200 +8cy3lv002 cy3lv020 39k100 39k165 39k30 39k50 cy3lv010 cy39200v	PDF
bga 484 0.8mm pitch Abstract: 20532 tqfp 39K100 39K200 39K30 39K50 484FBGA CY39200V208-181NTXC CY39100V208B-125NTxC cy39030v208-125ntxc Contextual Info: Delta39K ISR™ CPLD Family CPLDs at FPGA Densities™ Features • Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+ • Compatible with NOBL™, ZBT™, and QDR™ SRAMs	Original	delta39ktm 66-mhz 64-bit 39k165 +14208-eqfp 484-fbga 388-bga 676-fbga bga 484 0.8mm pitch 20532 tqfp 39k100 39k200 39k30 39k50 484fbga cy39200v208-181ntxc cy39100v208b-125ntxc cy39030v208-125ntxc	PDF
CY39100V484-125BBI Abstract: "Single-Port RAM" delta39k Contextual Info: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ •Multiple I/O standards supported — LVCMOS, LVTTL, 3.3V PCI, SSTL2 I-II , SSTL3 (I-II), HSTL (I-IV), and GTL+ •Compatible with NOBL™, ZBT™, and QDR™ SRAMs •Programmable slew rate control on each I/O pin	Original	delta39ktm cy39100v484-125bbi single-port ram delta39k	PDF
NT208 Abstract: 1kx8 rom 250NTC Contextual Info: Delta39K ISR™ CPLD Family PRELIMINARY CPLDs at FPGA Densities™ •Carry-chain logic for fast and efficient arithmetic operations •Multiple I/O standards supported — LVCMOS 3.3/3.0/2.5/1.8V , LVTTL, 3.3V PCI, SSTL2 (I-II), SSTL3 (I-II), HSTL (I-IV), and GTL+	Original	delta39ktm 250-mhz nt208 1kx8 rom +1250ntc	PDF