MEMORY BUBBLE Search Results

DS3615

Abstract: NBM2256 tazer 74LS164 74LS165 NBC82853 MC811 microbus FAIU
Contextual Info: December19£ p r e lim in a r y NBC82851256k-Bit Bubble Memory Controller General Description The NBC82851 is a dedicated bubble memory controller designed fo r use w ith N ational S e m iconductor’s NBM2256 256k-bit magnetic bubble memory. The control­

bubble memory

Contextual Info: p r e l im in a r y NBC82851256k-Bit Bubble Memory Controller General Description The NBC82851 is a dedicated bubble memory controller designed fo r use w ith N ational S em icon ducto r’s NBM2256 256k-bit m agnetic bubble memory. The control­ ler is designed so that a m inim um of interface circuitry is

BPK-72 Bubble Memory

Abstract: IMB-72 Bubble Memory BPK72 7110a-1 Intel 8080 7254 coil driver Intel BUBBLE INTEL 7254 BPK-70 Bubble Memory
Contextual Info: in te i rauyiMioiMÄW BPK 72A 1MBIT BUBBLE MEMORY PROTOTYPE KIT BPK 72A-1 0 To 75 °C BPK 72A-4 10°C To 55°C BPK 72A-5* —20°C To 85°C Assembled and Tested 1MBit Bubble Memory Prototype Kit on 4” x 4” PC Board 1Mbit, Non-Volatile, Read-Write, Solid-State Memory in Leaded Dense

bubble memory

Abstract: Non-Volatile Random Access Memory nvrams magnetic bubble memories
Contextual Info: ARTICLE REPRINT AR-468 Keeping data sale with nonvolatile memory The author sorts out the myriad nonvolatile memory options available, including ROMs, PROMs, EPROMs, EsPROMs, NVRAMs, plus others. T erry Kendall Technical Marketing Engineer Memory Com ponents Div.

DDR2 phy

Abstract: verilog hdl code for parity generator powerPC 440 schematics MT4HTF3264H ug406 PPC440MC VIRTEX-5 DDR2 sdram mig 3.61 LXT 971 VIRTEX-5 DDR PHY XAPP701
Contextual Info: LogiCORE IP Multi-Port Memory Controller v6.06.a DS643 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP Multi-Port Memory Controller (MPMC) is a fully parameterizable memory controller that supports SDRAM/DDR/DDR2/DDR3/LPDDR

DS643

Abstract: microblaze locallink xilinx DDR3 controller user interface v605a B32R VIRTEX-5 DDR2 sdram mig 3.61 spartan6 mig ddr3 ddr3 ram slot pin detail 240 pin 0x000001DF verilog code for ddr2 sdram to virtex 5 using ip
Contextual Info: LogiCORE IP Multi-Port Memory Controller v6.05.a DS643 October 19, 2011 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP Multi-Port Memory Controller (MPMC) is a fully parameterizable memory controller that supports SDRAM/DDR/DDR2/DDR3/LPDDR

Contextual Info: LogiCORE IP Multi-Port Memory Controller v6.06.a DS643 February 22, 2013 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP Multi-Port Memory Controller (MPMC) is a fully parameterizable memory controller that supports SDRAM/DDR/DDR2/DDR3/LPDDR

Bubble Memory

Abstract: TA 7230 P intel 8085 Intel BUBBLE 7230 intel 7110 intel 8088 memory memory bubble INTEL 7230 S6590
Contextual Info: 7230 CURRENT PULSE GENERATOR FOR BUBBLE MEMORIES TTL Compatible Inputs Provides all Pulses for IM’s Bubble Memories — Replicate, Swap, Generate, Boot Replicate and Bootswap Current Sink Outputs Designed to Directly Drive Bubble Memory • Direct Interface to Bubble Memory

intel 7110

Abstract: MAGNETICA bubble memory "bubble memory" content addressable memory sense amplifier "content addressable memory" sense amplifier Intel BUBBLE magnetic bubble memories
Contextual Info: iny A PRIMER ON MAGNETIC BUBBLE MEMORY Magnetic bubble memory is a solid-state technology with high reliability, ruggedness, small size, light weight, and limited power dissipation. It has applications in telecommunications, data acquisition, industrial control, terminals, and small busi­

256KBIT

Abstract: bubble memory bubble timing generator sync INS82851 NBM2256 256k FIFO
Contextual Info: INS82851 National Magnetic B uttle Memories Semiconductor PREVIEW INS82851 Bubble Memory Controller General Description Features The INS82851 is an NMOS con troller s pecifically programmed fo r use with National S em iconductor’s NBM2256 256K-bit magnetic bubble memory. The

NBM2256

Abstract: generator with magnetic permanent magnetic bubble memories bubble memory bubble memories
Contextual Info: Magnetic Bubble Memories « « iew NBM2256 Bubble Memory General Description National Semiconductor’s NBM2256 is a low cost, non-volatile, highly reliable solid state memory that uses magnetic bubble technology. The NBM2256 has the form of a dual-in-line package

33512

Abstract: a/MC 3351
Contextual Info: Extended Temperature Range Supplement 3351 40 x 9 FIFO Memory MOS Memory Products Logic Symbol Description The 3351 is a First-In First-Out FIFO memory used in data rate buffering applications. The 3351 has a capacity of 40 9-bit words. The words are accepted at

STR S 6307

Abstract: str 6307 uP 6308 AD STR 6309 STR 6307 POWER uP 6308 AP str s 6309 LT 7224 of str 6309 str 6308
Contextual Info: 7224 CONTROLLER FOR 4MBIT BPK 5V74 BUBBLE MEMORY SUBSYSTEM • Provides Interface between Host Microprocessor and 4 Mbit Bubble Memory Subsystems ■ 18 Easy-to-Use Commands . Three Modes of Data Transfer _ ■ Interlaces to 8080/85/86/88/186/286 and Other Standard Microprocessors

Contextual Info: CYM4210 CYM4220 CYPRESS _ SEMICONDUCTOR Cascadeable 8K x 9 FIFO Cascadeable 16K x 9 FIFO Features Functional Description • 8K x 9 FIFO buffer memory 4210 or 16K x 9 FIFO buffer memory (4220) The CYM4210 isa first-in first-out (FIFO) memory module that is 8,192 words by 9

ms 7254 ver 3.0

Abstract: AR-243 motorola bubble memory controller intel 7114 bubble
Contextual Info: irrtei ARTICLE REPRINT AR-243 Thin-film detectors, X-ray lithography deliver 4-Mbit bubble chip Next-generation bubble memory chip is even smaller than the compatible, 1-Mbit device; set of support circuits takes care of memory system requirements. Propelled by X-ray lithogra­

EBSA-110

Abstract: CP15
Contextual Info: Memory Management on the StrongARM SA-110 Ref. Number: DS internal ESAE-001-A01 The SA-110 is the first StrongARM implementation of the ARM Architecture. This paper provides an overview of memory management followed by details specific to the ARM architecture then the SA-110 implementation itself. The MMU (memory

3351-2

Abstract: 1N4152
Contextual Info: 3351 40 x 9 FIFO Memory MOS Memory Products Description The 3351 is a First-In First-Out F IF O memory used in data rate buffering applications. The 3351 has a cap acity of 40 9-bit words. The words are accep ted at the input, automatically shifted towards the output,

Contextual Info: 3 3 4 1 /3 3 4 1 A 64 x 4 FIFO Serial Memory MOS Memory Products Description The 3341 or 3341A is a 64-word x 4-bit First-In First-Out FIFO Serial Memory. Inputs and the outputs are completely independent (no common clocks) making the 3341/3341A ideal for

RQR-ME-030B

Abstract: 91208 INNER CARTON LABEL MR260
Contextual Info: 107-68879 Packaging Specification 07Aug09 Rev O RITS CONN & MEMORY BOARD 1. PURPOSE 目的 Define the packaging specifiction and packaging method of RITS CONN & MEMORY BOARD. 订定 RITS CONN & MEMORY BOARD 产品之包装规格及包装方式。 2. APPLICABLE PRODUCT 适用范围

Contextual Info: 107-68879 Packaging Specification 06Nov2012 Rev E RITS CONN & MEMORY BOARD 1. PURPOSE 目的 Define the packaging specifiction and packaging method of RITS CONN & MEMORY BOARD. 订定 RITS CONN & MEMORY BOARD 产品之包装规格及包装方式。 2. APPLICABLE PRODUCT 适用范围

bubble memory

Abstract: driver 1028 TDA 1028 TPS 1028 NBM2011 "Barium Ferrite"
Contextual Info: November 1980 NBM2011 1M x 1 Magnetic Bubble Memory Device General Description The NBM2011 is a 1,048,576 220 bit magnetic bubble memory device. All required magnetic components, in­ cluding the drive field coils, permanent magnets and pro* tective magnetic shield are integral parts of the device. It

D23341

Contextual Info: Extended Temperature Range Supplement 3341 /3 3 4 1 A 64 x 4 FIFO Serial Memory MOS Memory Products D escrip tio n The 3341 or 3 3 4 1 A is a 64-word x 4-bit First-In First-Out FIFO serial memory. Inputs and the outputs are completely independent (no common

BPK72

Abstract: intel 7110 DMA Controller 8257 isbx-251
Contextual Info: APPLICATION NOTE AP-157 O c to b e r 1983 AP-157 INTRODUCTION^ The 7220-! is a single-chip LSI Bubble Memory Controller BMC that implements a bubble memory storage subsystem (with up to eight bubble storage units (BSUs) per BMC). Each bubble storage unit consists of five support circuits in addition

3341ADC

Abstract: f3341 D23341 3341AD 3341A
Contextual Info: Extended Temperature Range Supplement 3341 /3 3 4 1 A 64 x 4 FIFO Serial Memory MOS Memory Products Description The 3341 or 3341A is a 64-word x 4-bit First-In First-Out FIFO serial memory. Inputs and the outputs are com pletely independent (no common clocks) making the 3 3 4 1 /3 3 4 1 A ideal tor