ME502B Search Results

TXC-21055

Abstract: JESD22-A112-A PE65966 HDB3 coding
Contextual Info: E3RT Device 34 Mbit/s E3 Line Interface TXC-02053 DATA SHEET FEATURES DESCRIPTION • 34368 kbit/s line interface The TranSwitch 34 Mbit/s E3 Receiver/Transmitter Line Interface E3RT is a Bi-CMOS VLSI device that provides the functions needed for terminating the ITU-T

JT-G703

Contextual Info: MRT Device 6-, 8-, 34- Mbit/s Line Interface TXC-02050C DATA SHEET DESCRIPTION • 6312/8448/34368 kbit/s line interface • AGC and equalizer • Line quality monitor 10-6 error rate threshold • Receive loss of signal and transmit loss of clock alarms

DUXBURY

Contextual Info: » C llf lT # ^ L I@ ^ 1 /1 / I I I E3RT Device .W 34 Mbit/s E3 Line Interface TXC-02053 - DATA SHEET DESCRIPTION FEATURES • 34368 kbit/s line interface • 22 dB input dynamic range 100 mVp to 1.2 Vp • Fully differential receiver input for noise immunity

ME502B

Abstract: circuit inter CV 203 DUXBURY
Contextual Info: E3RT Device m A l / l / I T 34 Mbit/s E3 Line Interface TXC-02053 f . H — DATA SHEET DESCRIPTION FEATURES • 34368 kbit/s line interface • 22 dB input dynamic range 100 mVp to 1.2 Vp • Fully differential receiver input for noise immunity • AGC and adaptive equalizer for 0-1300 feet of

TXC-02054

Abstract: E2 hdb3 TXC-02054-MB uses of 0.1 MICROFARAD ceramic disk TXC-02054AIPL HDB3 nrz e2 1N4148 1N914 74ACT11244 PE-65966
Contextual Info: MRTE Device 8-, 34- Mbit/s Line Interface TXC-02054 FEATURES DESCRIPTION • 8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit E2/E3 MRTE Line Interface is a CMOS VLSI device that provides the functions needed for terminating two ITU-T

txc 24.5

Abstract: E2 hdb3 TXC-21055 1N4148 1N914 AN-517 PE-65966 TXC-02050C ME502B A2917
Contextual Info: MRT Device 6-, 8-, 34- Mbit/s Line Interface TXC-02050C FEATURES DESCRIPTION • 6312/8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit MRT Line Interface is a CMOS VLSI device that provides the functions needed for terminating two ITU-T line rates,

JT-G703

Abstract: 1N4148 1N914 AN-517 PE-65966 PE-65969 TXC-02050C HDB3 coding EQB-0
Contextual Info: Proprietary TranSwitch Corporation Information for use Solely by its Customers MRT TXC-02050C DATA SHEET BLOCK DIAGRAM LINE SIDE TERMINAL SIDE EQB1 EQB0 LOW VAGC GNDA AGFIL RXLOS VCOC PLLC PNENB RXDIS + RP/RD HDB3 - RN Decoder clk + DI1 DI2 Equalization Network

Contextual Info: MRT Device 6-, 8-, 34- Mbit/s Line Interface TXC-02050C FEATURES DESCRIPTION • 6312/8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit MRT Line Interface is a CMOS VLSI device that provides the functions needed for terminating two ITU-T line rates,