MD54H Search Results

MD54HCT374RC

Abstract: MD74HCT374RE 574R JEDEC CP 16
Contextual Info: MD54/74HCT374R Octal D-Type Flip Flop February '85 Features CONNECTION DIAGRAM DIP TOP VIEW • High latch-up immunity •High current outputs can drive 30 LSTTL loads • Low power ISO-CMOS technology •Bus oriented 3-state outputs • Meets or exceeds all proposed JEDEC 40.2

C-803

Contextual Info: MD54/74HCT374R Octal D-Type Flip Flop February '85 Features CONNECTION DIAGRAM DIP TOP VIEW • High latch-up immunity ÔË C 1 o0 C 2 D0 C 3 • D, C 4 0, C 5 o2 C 6 d2 C 7 D, C 8 03 C 9 G N D C 10 • High current outputs can drive 30 LSTTL loads • Low power ISO -CM O S technology

MD74HCT240RE

Abstract: 240R 74LS240 MD54HCT240RC TP13a H Driver 16 Pin DIP
Contextual Info: hhh MPPP WID54/74WCI24ÔR Inverting O cta liin « Dri v*f/Buffer February'85 Features CONNECTION D IA G R A M D IP T O P V IEW • High latch-up immunity • High current outputs can drive 30 LSTTLloads • Low power ISO-CMOS technology •Bus oriented 3-state outputs

MD74HCT541RE

Contextual Info: MD54/74HCT541R Octal Line Driver/Buffer February '85 Features CONNECTION DIAGRAM DIP TOP VIEW • High latch-up immunity • High current outputs can drive 30 LSTTL loads C 1 20 3 V cc >. C 2 19 3 ëb I, c 3 18 '2 C 4 17 '3 C 5 16 U C 6 15 Is C 7 14 '6 C

MD74HCT373RE

Abstract: MD74HCT373
Contextual Info: Octal D-TypeTrgrtsparehtLatch February'85 Features CONNECTION DIAGRAM DIP TOP VIEW •High latch-ufirlmMyniJy * ’ ~*'‘ ’ •*" «' _ • High current outputs cah drive 30 LSTTL loads 1 20 U Vcc 19 =>o7 18 ] D , . Pa C 2 • Low power IS&-CMOS technology

Contextual Info: MD54/74WCI24ÔR Inverting O ctaliin« Driver/Buffer Fëbruary'85 Features CONNECTION DIAGRAM DIP TOP VIEW >High latch-up immunity »High current outputs can drive 30 LSTTL loads 1 20 3 Vcc * Low power ISO-CMOS technology 2 19 18 4 17 5 :16. : 6 15 °2 b C

74LS573

Contextual Info: M P t5 O T4 # S Ç fS 7i«l Octal D-TypesTrsrupafeiitLatch February '85 Features CONNECTION DIAGRAM •High latch-m immiunity • High current outputs cap drive 30 LSTTL loads • Low power |SO-CMOS tfchnology •Bus oriented 3-state outputs • Meets or exceeds all proposed JEDEC 40.2

Contextual Info: I MD54/74HCT245R Octal Bus Transceiver with 3-State Buffered Outputs February *85 Features • High latch-up immunity •High current outputs can drive 30 LSTTL loads CONNECTION DIAGRAM DIP TOP VIEW • Low power ISO-CMOS technology •Bus oriented 3-state outputs

MD54HCT541RC

Abstract: c516 C813
Contextual Info: MD54/74HCT541R Octal Line Driver/Buffer February '85 Features CON NECTIO N D IA G R A M D IP TO P VIEW • High latch-up immunity •High current outputs can drive 30 LSTTL loads • Low power ISO -CM O S technology c 1 20 'a C 2 19 3 18 '2 C 4 17 '3 C 5

of 74LS138 3 to 8 decoder

Abstract: MD74HCT138
Contextual Info: wmmwttw 1 of a Ocial D *m >d«/P!«n^i|p^ar Features CONNECTION DIAGRAM OH> TOP VIEW • High latch-up immunity • High current outputs can drive 15 LSTTL loads V C 1 • Low power ISO -C M O S technology A, c 2 16 3 V « '5 a, : 3 14 , c 4 i . ’ • Meets or exceeds all proposed JEDEC 40.2

MD54HCT241RC

Abstract: OB16 C615
Contextual Info: MD54/74HCT241R Octal Line Driver/Buffer February '85 Features CONNECTION D IAG RAM DIP TOP VIEW Êa c 1 20 < n • Low power ISO-CMOS technology ka c 2 19 ^ E b °0 b c 3 18 'la c 4 17 o ,b c 5 16 ha c 6 15 7 S 14 c 8 13 o 3b c 9 12 10 11 • Pin compatible with 54/74LS241 types

ic 74hct139

Abstract: 74HCT MD54HCT139RC MD74HCT139RE
Contextual Info: MD54/74HCT139R Dual 1 of 4 Decoder/Demultiplexer February '85 Features CONNECTION DIAGRAM DIP TO P VIEW • High latch-up immunity Ea c 1 16 A fla L 2 15 ^1a C 3 14 ^ •High current outputs can drive 15 LSTTL loads 13 ^ 12 11 ^ Oob ^ o lb c 7 c 8 10 3 o 2b

latch 74ls574

Abstract: 74LS574 74LS574 specifications
Contextual Info: MD54/74HCT574R gy i M| Tc| T m Octal D-Type Flip Flop February '85 Features CONNECTION DIAGRAM DIP TOP VIEW • High latch-up immunity •High current outputs can drive 30 LSTTL loads • Low power ISO -CM O S technology 1 20 D0 C 2 19 3 18 OE C d •Bus oriented 3-state outputs

74HCT241

Abstract: 74ls241
Contextual Info: MD54/74HCT241R Octal Line Driver/Buffer February '85 Features CONNECTION DIAGRAM DIP TOP V IEW F, C 3 18 I,. c 4 17 5 16 GND C 6 15 7 ^ 14 8 13 9 12 10 11 -1 ]0b TT o 30b E It •Bus oriented 3-state outputs • Meets or exceeds all proposed JEDEC 40.2

74ls573

Abstract: 373R 74LS573 "LATCH" MD54HCT573RC MD74HCT573RE
Contextual Info: H M H JN I :ê wmjiwmmm m- " Octal D-TypQTrsrjspaf epntLatch February '85 Features CONNECTION DIAG RAM QIP TO P VIEW • High Iatch -140 irrmtunity • High curren| outputs cap drive 30 LSTTL loads 2 ° : Vcc QE C • Low power |SO-CMOS technology •Busoriented 3-state outputs

74LS138 pin diagram

Abstract: ASTAS MD74HCT138RE 74HCT138 74ls138 MD54HCT138 Hll logic 74HCT138 DIP
Contextual Info: mm ' MQ54/MHCÎÎ38R 1 o f 8 O e U l t ^ o ^ / O ç n j ^ ^ if er Features CONNECTION DIAG RAM OU> TOP VIEW • High latch-up immunity • High current outputs can drive 15 LSTTL loads ? . ’ • Low power ISO-CMOS technology A. -C 1 A, C 2 A2 t 3 • Meets or exceeds all proposed JEDEC 40.2

MD74HCT373RE

Abstract: 373R 74ls373 LA1D1 MD74HCT373
Contextual Info: Octal D-Type Transparent Latch Fêbruary'85 Features CONNECTION DIAGRAM DIP {TOP VIEW •High latch-ufirlmrtyn,|Jy •High current outputs cab drive 30 LSTTL loads • Low power IS&-CMOS technology • Bus oriented 3-state outputs • Meets or exceeds all proposed JEDEC 40.2

MD74HCT245RE

Abstract: MD54HCT245RC 74LS245 TTL 74ls245
Contextual Info: I MD54/74HCT245R Octal Bus Transceiver with 3-State Buffered Outputs February *85 Features • High latch-up immunity CONNECTION DIAGRAM DIP TO P VIEW • High current outputs can drive 30 LSTTL loads • Low power ISO-CMOS technology DIR C 1 20 Ag C 2

Contextual Info: MD54/74HCT139R Dual 1 of 4 Decoder/Demultiplexer February '85 Features CONNECTION DIAGRAM DIP TOP VIEW î. C IT « <? A,a C 0„a C 1 16 2 15 3 14 4 13 C 5 12 0 2a c 6 11 0 3a c 7 10 8 9 o„ GND C 3 v cc ^ Aob -I Alb -I Oob ^ o lb 3 o 2b TT O cr • High latch-up immunity

Contextual Info: M054/74HCT540R Inverting Octal LìneDrìver/Buffer February'85 Features CONNECTION DIAGRAM DIP TOP VIEW •High latch-up immunity •High current outputs can drive 30 LSTTL loads • Low power!ISO-CMOS technology •Bus orient^ 3-state outputs • Meets or exceeds all proposed JEDEC 40.2