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    MC74LVX50DR2G Search Results

    MC74LVX50DR2G Datasheets (2)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    MC74LVX50DR2G
    On Semiconductor Hex Buffer; Package: SOIC 14 LEAD; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500 Original PDF 144.07KB 10
    MC74LVX50DR2G
    On Semiconductor MC74LVX50 - IC LV/LV-A/LVX/H SERIES, HEX 1-INPUT NON-INVERT GATE, PDSO14, LEAD FREE, SOIC-14, Gate Original PDF 184.05KB 11
    SF Impression Pixel

    MC74LVX50DR2G Price and Stock

    onsemi

    onsemi MC74LVX50DR2G

    - Tape and Reel (Alt: MC74LVX50DR2G)
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    Avnet Americas () MC74LVX50DR2G Reel 7,500 9 Weeks 2,500
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    MC74LVX50DR2G Reel 5,556
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    Mouser Electronics MC74LVX50DR2G 3,567
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    Verical () MC74LVX50DR2G 10,894 1,838
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    MC74LVX50DR2G 6,555 1,838
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    MC74LVX50DR2G 3,534 1,838
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    MC74LVX50DR2G 3,285 1,838
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    MC74LVX50DR2G 2,500 2,500
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    MC74LVX50DR2G 2,359 1,838
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    MC74LVX50DR2G 2,278 1,838
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    Arrow Electronics MC74LVX50DR2G 2,500 13 Weeks 2,500
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    Newark MC74LVX50DR2G Reel 2,500
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    Onlinecomponents.com MC74LVX50DR2G
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    Rochester Electronics MC74LVX50DR2G 32,862 1
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    Chip 1 Exchange MC74LVX50DR2G 2,125
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    Avnet Silica MC74LVX50DR2G 2,500 14 Weeks 2,500
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    EBV Elektronik MC74LVX50DR2G 2,500 15 Weeks 2,500
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    Flip Electronics MC74LVX50DR2G 10,000
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    Wuhan P&S MC74LVX50DR2G 1,635 1
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    onsemi MC74LVX50DR2G.

    Logic Device Type:Buffer; Ic Case/Package:Soic; No. Of Pins:14Pins; Supply Voltage Min:2V; Supply Voltage Max:3.6V; Logic Ic Family:74Lvx; Operating Temperature Min:-40°C; Operating Temperature Max:85°C; Qualification:- Rohs Compliant: Yes |Onsemi MC74LVX50DR2G.
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Newark MC74LVX50DR2G. Reel 7,500 2,500
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    MC74LVX50DR2G Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    LVX50G

    Abstract: MC74LVX50DTR2G marking code a5 sot363
    Contextual Info: MC74LVX50 Hex Buffer The MC74LVX50 is an advanced high speed CMOS buffer fabricated with silicon gate CMOS technology. The internal circuit is composed of three stages, including a buffered output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V


    Original
    MC74LVX50 SOIC-14 TSSOP-14 SOEIAJ-14 LVX50 LVX50 LVX50G MC74LVX50/D MC74LVX50DTR2G marking code a5 sot363 PDF

    Contextual Info: MC74LVX50 Hex Buffer The MC74LVX50 is an advanced high speed CMOS buffer fabricated with silicon gate CMOS technology. The internal circuit is composed of three stages, including a buffered output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V


    Original
    MC74LVX50 MC74LVX50 MC74LVX50/D PDF

    74LVX50

    Abstract: MC74LVX50 MC74LVX50D MC74LVX50DG MC74LVX50DR2 MC74LVX50DR2G MC74LVX50DT
    Contextual Info: MC74LVX50 Hex Buffer The MC74LVX50 is an advanced high speed CMOS buffer fabricated with silicon gate CMOS technology. The internal circuit is composed of three stages, including a buffered output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V


    Original
    MC74LVX50 MC74LVX50 74LVX50 MC74LVX50D MC74LVX50DG MC74LVX50DR2 MC74LVX50DR2G MC74LVX50DT PDF

    74LVX50

    Abstract: MC74LVX50 MC74LVX50D MC74LVX50DG MC74LVX50DR2 MC74LVX50DR2G MC74LVX50DT
    Contextual Info: MC74LVX50 Hex Buffer The MC74LVX50 is an advanced high speed CMOS buffer fabricated with silicon gate CMOS technology. The internal circuit is composed of three stages, including a buffered output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V


    Original
    MC74LVX50 MC74LVX50 MC74LVX50/D 74LVX50 MC74LVX50D MC74LVX50DG MC74LVX50DR2 MC74LVX50DR2G MC74LVX50DT PDF

    Contextual Info: MC74LVX50 Hex Buffer The MC74LVX50 is an advanced high speed CMOS buffer fabricated with silicon gate CMOS technology. The internal circuit is composed of three stages, including a buffered output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V


    Original
    MC74LVX50 MC74LVX50 MC74LVX50/D PDF