MC74FXXXDW Search Results

74F568

Abstract: MC54/74F568 MC74FXXXDW
Contextual Info: MC54/74F568 MC54/74F569 4-BIT BIDIRECTIONAL COUNTERS WITH 3-STATE OUTPUTS The MC54/ 74F568 and MC54/74F569 are fully synchronous, reversible counters with 3-state outputs. The F568 is a BCD decade counter; the F569 is a binary counter. They feature preset capability for programmable operation, carry lookahead for easy cascading, and a U/D input to control the direction of counting. For maximum flexibility there are both synchronous and master asynchronous reset inputs as well as both Clocked Carry (CC) and

MC74F579

Abstract: MC74FXXXDW
Contextual Info: 8-BIT BIDIRECTIONAL BINARY COUNTER 3-STATE The MC74F579 is a fully synchronous 8-stage up/down counter with multiplexed 3-state I/O ports for bus-oriented applications. It features a preset capability for programmable operation, carry look-ahead for easy cascading

74F534

Abstract: F374 MC54 MC74FXXXDW
Contextual Info: OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS The MC54 / 74F534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A buffered Clock CP and Output Enable (OE) are

74F538

Abstract: MC54 MC74FXXXDW
Contextual Info: 1-OF-8 DECODER WITH 3-STATE OUTPUTS The MC54 / 74F538 decoder/demultiplexer accepts three Address A0 – A2 input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active

MC74FXXXDW

Abstract: 74F245
Contextual Info: 3 MC54/74F245 OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE INPUTS/OUTPUTS OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE INPUTS/OUTPUTS The MC54/74F245 contains eight noninverting bidirectional buffers with 3-state outputs and is intended for bus-oriented applications. Current sinking

MC74F373

Abstract: MC74F374 MC74F377 MC74FXXXDW d718 D03E
Contextual Info: MC74F377 OCTAL D FLIP-FLOP WITH ENABLE The MC74F377 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with individual D inputs and Q outputs. The common buffered clock CP input loads all flip-flops simultaneously when the Enable

Contextual Info: OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS LIFETIME BUY The MC74F574 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A buffered clock CP and Output Enable (OE) are common to

Contextual Info: OCTAL REGISTERED TRANSCEIVER, NON-INVERTING, 3-STATE The MC74F543 Octal Registered Transceivers contain two sets of data flowing in either direction. Separate Latch Enable LEAB, LEBA and Enable (OEAB, OEBA) inputs are provided for each register to permit independent

74F245

Abstract: 74F373 MC74F544 MC74FXXXDW
Contextual Info: M M O T O R O L A MC74F544 OCTAL R E G IST E R E D TRA N SCEIVER, INVERTING, 3-STATE OCTAL REGISTERED TRANSCEIVER, INVERTING, 3-STATE The MC74F544 Octal Registered Transceivers contain two sets of D-Type latches for te mporary storage of data flowing in either direction. Separate

F374

Abstract: MC74FXXXDW F534 74f534
Contextual Info: M MOTOROLA MC54/74F534 OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS T h e M C 5 4 /7 4 F 5 3 4 is a h ig h -sp e e d , lo w -p o w e r o cta l D -typ e flip -flo p fe a tu rin g se p a ra te D -typ e in p u ts fo r e ach flip -flo p and 3 -sta te o u tp u ts fo r bus

t569

Contextual Info: MOTOROLA 4-BIT BIDIRECTIONAL COUNTERS WITH 3-STATE OUTPUTS T h e M C 5 4 /7 4 F 5 6 8 and M C 5 4 /7 4 F 5 6 9 a re fu lly s yn ch ro n o u s, re versib le c o u n te rs w ith 3 -sta te o utp uts. T h e F568 is a B C D d e ca d e co un ter; th e F569 is a b in a ry coun ter. T h e y fe a tu re p re se t ca p a b ility fo r p ro g ra m m a b le o p e ra ­

Contextual Info: M MOTOROLA MC54/74F381 4-BIT ARITHMETIC LOGIC UNIT The MC54/74F381 performs three arithmetic and three logic operations on two 4-bit words, A and B. Two additional Select input codes force the Function outputs LOW or HIGH. Carry Propagate and Generate outputs are provided

CD Octal D-type flip-flop

Contextual Info: M MOTOROLA MC54/74F374 OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS The MC54/74F374 is a high-speed, low-power octal D-type flip-flop featur­ ing separate D-type inputs for each flip-flop and 3-state outputs for bus ori­ ented applications. A buffered C lock (CP) and Output Enable (OE) are com ­

74F534

Abstract: F374 MC54 MC74FXXXDW
Contextual Info: MC54/74F534 OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS The MC54 / 74F534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A buffered Clock CP and Output Enable (OE) are

f244

Abstract: F240 F241 MC74FXXXDW IB39
Contextual Info: MC54/74F240 MC54/74F241 MC54/74F244 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS The F240, F241 and F244 are octal buffers and line drivers designed to be employed as memory address drivers, clock drivers, and bus-oriented transmitters/receivers which provide improved PC board density.

Contextual Info: LIFETIME BUY These devices consist of bus transceiver circuits with 3-state D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a

cd4xxx

Abstract: qsc 1110 SN74ACTXXXPW 74HCxx SN74LVCxxx semiconductor cross reference M74HCXXXB1R M74HCXXXM1R SN74ACTXXXN M-SD-DT
Contextual Info: Lit. #585362-003 Fairchild Semiconductor LOGIC INDUSTRY CROSS-REFERENCE GUIDE REV. 4/2000 Visit us on the Web at www.fairchildsemi.com LOGIC INDUSTRY CROSS-REFERENCE GUIDE Family ABT AC ACT ACTQ ALS AS CD4K ECL F FAST, (FASTr) Package PDIP SOIC Wide Body SOIC

Motorola F244

Abstract: f244 motorola f244 74f244 motorola F240 F241 MC74FXXXDW motorola 74f244
Contextual Info: MC54/74F240 MC54/74F241 MC54/74F244 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS The F240, F241 and F244 are octal buffers and line drivers designed to be employed as memory address drivers, clock drivers, and bus-oriented transmitters/receivers which provide improved PC board density.

MC74F269

Abstract: MC74FXXXDW
Contextual Info: LIFETIME BUY The MC74F269 is a fully synchronous 8-stage up/down counter featuring a preset capability for programmable operation, carry look-ahead for easy cascading and a U/D input to control the direction of counting. All state changes, whether in counting or parallel loading, are initiated by the rising

74F539

Abstract: MC54 MC74FXXXDW
Contextual Info: MC54/74F539 DUAL 1-OF-4 DECODER WITH 3-STATE OUTPUTS The MC54 / 74F539 contains two independent decoders. Each accepts two Address A0 – A1 input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines whether the

f827

Abstract: MC74FXXXDW D078 2D03
Contextual Info: MC54/74F827 MC54/74F828 10-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS The MC54/74F827 and MC54/74F828 10-bit bus buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. The 10-bit buffers have NOR output enables for maximum control

F299

Abstract: MC74F323 MC74FXXXDW
Contextual Info: For:char Printed on:Mon, Feb 6, 1995 09:48:26 From book:DL121CH4 5 VIEW Document:MC74F323 (5) VIEW Last saved on:Fri, Feb 3, 1995 16:04:13 MC74F323 8-INPUT SHIFT/STORAGE REGISTER WITH SYNCHRONOUS RESET AND COMMON I/O PINS The MC74F323 is an 8-Bit Universal Shift/Storage Register with 3-state

f245 motorola

Abstract: Motorola F245 7474an Diode B4 Motorola
Contextual Info: For:joe Printed on:Fri, Aug 27, 1999 08:37:45 Document:mc74f640rev5ltb Last saved on:Wed, Aug 25, 1999 12:45:29 OCTAL BUS TRANSCEIVER, INVERTING WITH 3-STATE OUTPUTS The MC74F640 is an octal transceiver featuring inverting 3-state bus compatible outputs in both transmit and receive directions. The B port outputs are

Contextual Info: 1-OF-8 DECODER WITH 3-STATE OUTPUTS The MC54 / 74F538 decoder/demultiplexer accepts three Address A0 – A2 input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active