MC1013 Search Results

Contextual Info: MC10131L IL08 ECL D-TYPE FLIP FLOP —TOP VIEW— 5 1 GND GND 16 7 6 1Q 2 15 2Q 1Q 3 14 2Q SD Q D Q 2 3 RD 1RD 4 13 2RD 4 9 INPUTS SD RD CK x 1 x 1 x 1 1 OUTPUTS D Qn+1 Qn+1 x 1 x 1 x ND ND 1 1 1 x Qn Qn 12 1SD 5 12 2SD 1CK 6 11 2CK 10 SD Q D 11 Q RD 1D 7

MC10134

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Multiplexer With Latch MC10134 The MC10134 is a dual multiplexer with clocked D type latches. Each latch may be clocked separately by holding the common clock in the low state, and using the clock enable Inputs tor the clocking function. If the common clock is to

MC10135P

Abstract: MC10135L k1 marking MC10135 MC10135FN jk flipflop 425
Contextual Info: MC10135 Dual J-K Master-Slave Flip-Flop The MC10135 is a dual master–slave dc coupled J–K flip–flop. Asynchro– nous set S and reset (R) are provided. The set and reset inputs override the clock. A common clock is provided with separate J–K inputs. When the

MC1013

Abstract: MC1213 MC314 "J-K Flip flops" AN-280 J-K Flip flops
Contextual Info: s 85-MHz AC COUPLED J-K FLIP-FLOPS \ M ECL II MC 1 0 0 0/1200 series MC1013 MC1213 Designed for use at clock frequencies to 70 MHz minimum 85 M Hz typical . Logic performing inputs (J and K) are available, as well as dc S ET and RESET inputs. POSITIVE LOGIC

2sa 102

Contextual Info: M OTOROLA SC M LOGIC O T O R O me M ECL The MC10132 is a dual multiplexer with clocked 0 type latches. It incorporates common data select and reset inputs. Each latch may be clocked separately by holding the common clock in the low state, and using the clock enable inputs for a clocking function.

MC10136

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Universal Hexadecimal Counter MCI 0136 The MC10136 is a high speed synchronous counter that can count up, count down, preset, or stop count at frequencies exceeding 100 MHz. The flexibility of this device allows the designer to use one basic counter for most applications,

MC10138

Abstract: t72 marking MC10138L MC10138FN MC10138P T1215
Contextual Info: MC10138 Bi-Quinary Counter The MC10138 is a four bit counter capable of divide by two, five, or ten functions. It is composed of four set–reset master–slave flip–flops. Clock inputs trigger on the positive going edge of the clock pulse. Set or reset input override the clock, allowing asynchronous “set” or

Marking d12

Abstract: MC10134 T62 marking
Contextual Info: MC10134 Dual Multiplexer With Latch The MC10134 is a dual multiplexer with clocked D type latches. Each latch may be clocked separately by holding the common clock in the low state, and using the clock enable inputs for the clocking function. If the common clock is to be used to clock the latch, the clock

MC10138

Abstract: T1215 MC10138FN MC10138L MC10138P t7315 T72 marking
Contextual Info: MC10138 Bi-Quinary Counter The MC10138 is a four bit counter capable of divide by two, five, or ten functions. It is composed of four set–reset master–slave flip–flops. Clock inputs trigger on the positive going edge of the clock pulse. Set or reset input override the clock, allowing asynchronous “set” or

MC10133

Abstract: MC10133P MC10133FN MC10133L
Contextual Info: MC10133 Quad Latch The MC10133 is a high speed, low power, quad latch consisting of four bistable latch circuits with D type inputs and gated Q outputs, allowing direct wiring to a bus. When the clock is high, outputs will follow D inputs. Information is latched on the negative going

MC10137

Abstract: MC10137L MC10137P MC10137FN
Contextual Info: MC10137 Universal Decade Counter The MC10137 is a high speed synchronous counter that can count up, down, preset, or stop count at frequencies exceeding 100 MHz. The flexibility of this device allows the designer to use one basic counter for most applications. The synchronous count feature makes

MC10136

Abstract: MC1670 DL122 MC10231 2MC10131 MC10136-D MC10136 PLCC
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Universal Hexadecimal Counter MC10136 The MC10136 is a high speed synchronous counter that can count up, count down, preset, or stop count at frequencies exceeding 100 MHz. The flexibility of this device allows the designer to use one basic counter for most applications,

MX0341

Abstract: 2Sa 1116
Contextual Info: MOTOROLA SC 14E D | b 3 b 7 2 5 2 0003033 2 | LOGIC MOTOROLA MC10134 DUAL MULTIPLEXER WITH LATCH D /IE C L LQK series The MC10134 is a dual multiplexer with clocked D type latches. Each latch may be clocked separately by holding the common clock in the low state, and using the clock enable inputs for the

mc10135

Contextual Info: MOTOROLA DUAL J-K MASTER-SLAVE FLIP-FLOP The MC10135 is a dual master-slave dc coupled J-K flip-flop. Asynchronous set S and reset (R) are provided. The set and reset _ inputs override the clock. A com mon clock is provided w ith separate J-K inputs. When

Contextual Info: MC10134 MOTOROLA MECL UJK DUAL MULTIPLEXER WITH LATCH The MC10134 is a dual multiplexer with docked D type latches. Each latch may be clocked separately by holding the common clock in the low state, and using the clock enable inputs for the clocking function. If the com m on clock is to be used to clock the

12 bit synchronous counter

Contextual Info: MOTOROLA MC10136 10K ; UNIVERSAL HEXADECIMAL COUNTER The M C 1 0 1 3 6 is a h igh spe ed sy n c h ro n o u s counter that can count up, co u n td o w n , preset, or stop count at frequencies exceed­ ing 100 MHz. The flexibility of this device allow s the d esign er to

CD79

Contextual Info: M O TO R O LA MC10137 UNIVERSAL DECADE COUNTER The MC10137 is a high speed synchronous counter that can count up, down, preset, or stop count at frequencies exceed­ ing 100 MHz. The flexibility of this device allows the designer to use one basic counter fo r most applications.The synchronous

MC10135

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual J-K Master-Slave Flip-Flop MCI 0135 The MC10135 is a dual m aster-slave dc coupled J -K flip-flop. Asynchro­ nous set S and reset (R) are provided. The set and reset inputs override the _ clock. A common clock is provided with separate J -K inputs. When the clock is

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad Latch The MC10133 is a high speed, low power, quad latch consisting of four bistable latch circuits with D type inputs and gated Q outputs, allowing direct wiring to a bus. When the clock is high, outputs will follow D inputs. Information

Contextual Info: MOTOROLA MC10133 QUAD LATCH The MC10133 ¡s a high speed, low power, quad latch consisting of four bistable latch circuits with D type inputs and gated Q outputs, allowing direct wiring to a bus. W hen the clock is high, outputs will follow D inputs. Information ¡s latched on the negative

MC10131

Abstract: MC10131-D DL122 2T62 LM 38 K
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Type D Master-Slave Flip-Flop MC10131 The MC10131 is a dual master–slave type D flip–flop. Asynchronous Set S and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flip–flop may be clocked separately by holding the common clock in the low state and

MC10136L

Abstract: MC1670 T1013 MC10136 MC10136 PLCC MC10136P MC10131 MC10136FN MC10231 t1314
Contextual Info: MC10136 Universal Hexadecimal Counter The MC10136 is a high speed synchronous counter that can count up, count down, preset, or stop count at frequencies exceeding 100 MHz. The flexibility of this device allows the designer to use one basic counter for most applications, and the synchronous count feature

MC10131P

Abstract: MC10131 MC10131L MC10131-D MC10131FN
Contextual Info: MC10131 Dual Type D Master-Slave Flip-Flop The MC10131 is a dual master–slave type D flip–flop. Asynchronous Set S and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flip–flop may be clocked separately by holding the common clock in the low state and using the enable inputs

MC10138

Abstract: DL122
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Bi-Quinary Counter MC10138 The MC10138 is a four bit counter capable of divide by two, five, or ten functions. It is composed of four set–reset master–slave flip–flops. Clock inputs trigger on the positive going edge of the clock pulse.