MARKING CODE TACS CHIP TRANSISTOR Search Results

HM628511CJPI12

Abstract: HM628511HCI HM628511HCJPI HM628511HCJPI-12 DSA003633
Contextual Info: HM628511HCI Series Wide Temperature Range Version 4M High Speed SRAM 512-kword x 8-bit ADE-203-1304A (Z) Rev. 1.0 Nov. 30, 2001 Description The HM628511HCI Series is a 4-Mbit high speed static RAM organized 512-k word × 8-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell)and high speed

HM62W8511HCJPI

Abstract: HM62W8511HCJPI-12 DSA003633
Contextual Info: HM62W8511HCI Series Wide Temperature Range Version 4M High Speed SRAM 512-kword x 8-bit ADE-203-1283A (Z) Rev. 1.0 Nov. 9, 2001 Description The HM62W8511HCI is a 4-Mbit high speed static RAM organized 512-kword × 8-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing

HM6216255CJPI12

Abstract: HM6216255CTTI12 HM6216255HCJPI-12 HM6216255HCTTI-12 Hitachi DSA0047
Contextual Info: HM6216255HCI Series Wide Temperature Range Version 4M High Speed SRAM 256-kword x 16-bit ADE-203-1305B (Z) Rev. 2.0 Dec. 5, 2002 Description The HM6216255HCI Series is a 4-Mbit high speed static RAM organized 256-k word × 16-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed

HM6216255CTTI12

Abstract: HM6216255HCJPI-12 HM6216255HCTTI-12 HM6216255CJPI12 DSA003633
Contextual Info: HM6216255HCI Series Wide Temperature Range Version 4M High Speed SRAM 256-kword x 16-bit ADE-203-1305A (Z) Rev. 1.0 Nov. 30, 2001 Description The HM6216255HCI Series is a 4-Mbit high speed static RAM organized 256-k word × 16-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed

HM624100HC

Abstract: HM624100HCJP-10 HM624100HCLJP-10 Hitachi DSA00316
Contextual Info: HM624100HC Series 4M High Speed SRAM 1-Mword x 4-bit ADE-203-1198B (Z) Rev. 1.0 Nov. 30, 2001 Description The HM624100HC is a 4-Mbit high speed static RAM organized 1-Mword × 4-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing

HM621400HC

Abstract: HM621400HCJP-10 HM621400HCLJP-10 transistor marking CS Hitachi DSA00316
Contextual Info: HM621400HC Series 4M High Speed SRAM 4-Mword x 1-bit ADE-203-1199B (Z) Rev. 1.0 Nov. 30, 2001 Description The HM621400HC is a 4-Mbit high speed static RAM organized 4-Mword × 1-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell)and high speed circuit designing

HM62W4100HC

Abstract: HM62W4100HCJP-10 HM62W4100HCJP-12 HM62W4100HCLJP-10 HM62W4100HCLJP-12 Hitachi DSA00316
Contextual Info: HM62W4100HC Series 4M High Speed SRAM 1-Mword x 4-bit ADE-203-1202C (Z) Rev. 2.0 Nov. 9, 2001 Description The HM62W4100HC is a 4-Mbit high speed static RAM organized 1-Mword × 4-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing

HM62W8511HC

Abstract: HM62W8511HCJP-10 HM62W8511HCJP-12 HM62W8511HCLJP-10 HM62W8511HCLJP-12 Hitachi DSA00316
Contextual Info: HM62W8511HC Series 4M High Speed SRAM 512-kword x 8-bit ADE-203-1201C (Z) Rev. 2.0 Nov. 9, 2001 Description The HM62W8511HC is a 4-Mbit high speed static RAM organized 512-kword × 8-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing

HM628511HC

Abstract: HM628511HCJP-10 HM628511HCLJP-10 HM628511CLJP Hitachi DSA00316 MARKING code TACS chip transistor
Contextual Info: HM628511HC Series 4M High Speed SRAM 512-kword x 8-bit ADE-203-1197B (Z) Rev. 1.0 Nov. 30, 2001 Description The HM628511HC Series is a 4-Mbit high speed static RAM organized 512-k word × 8-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell)and high speed circuit

HM6216255HC

Abstract: HM6216255HCJP-10 HM6216255HCTT-10 HM6216255CTT10 Hitachi DSA00331
Contextual Info: HM6216255HC Series 4M High Speed SRAM 256-kword x 16-bit ADE-203-1196B (Z) Rev. 1.0 Nov. 30, 2001 Description The HM6216255HC Series is a 4-Mbit high speed static RAM organized 256-k word × 16-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit

HM62W16255CLTT10

Abstract: Hitachi DSA00280
Contextual Info: HM62W16255HC Series 4M High Speed SRAM 256-kword x 16-bit ADE-203-1200C (Z) Rev. 2.0 Nov. 1, 2001 Description The HM62W16255HC is a 4-Mbit high speed static RAM organized 256-kword × 16-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing

Contextual Info: HY64UD16322A Series Document Title 2M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 03. ’03 Preliminary 1.1 Change process code May. 13. ’03 -B This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not

HYSD16322B

Abstract: hynix hy
Contextual Info: HY64SD16322B-DF Series Document Title 2Mx16 bit Low Low Power 1T/1C Pseudo SRAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft Jan. 2004 Preliminary Apr. 2005 Preliminary 1.0 Addition : Power-up timing diagram page 06 This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any

HY64LD16162M

Abstract: HY64LD16162M-DF85E HY64LD16162M-DF85I
Contextual Info: HY64LD16162M Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul.18. ’ 01 Preliminary Oct. 07. ‘ 01

HYNIX lot date code

Abstract: 1CS MARKING HY64SD16162B HY64SD16162B-DF85E HY64SD16162B-DF85I HYSD16162B
Contextual Info: HY64SD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Dec. 4. ’02 Preliminary Initial This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not

Contextual Info: HY64SD16322B-DF Series Document Title 2Mx16 bit Low Low Power 1T/1C Pseudo SRAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft Jan. 2004 Preliminary This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any

HY64SD16162B

Abstract: HY64SD16162B-DF85E HY64SD16162B-DF85I
Contextual Info: HY64SD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Dec. 4. ’02 Preliminary Initial This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not

Contextual Info: HY64SD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Dec. 4. ’02 Preliminary Initial This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not

Contextual Info: HY64LD16162M Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul.18. ’ 01 Preliminary Oct. 07. ‘ 01

HYUD16162B

Abstract: HY64UD16162B HY64UD16162B-DF60E HY64UD16162B-DF60I HY64UD16162B-DF70E HY64UD16162B-DF70I
Contextual Info: HY64UD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Dec. 3. ’02 Preliminary Initial This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not

HYUD16162B

Abstract: HYUD16162
Contextual Info: HY64UD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Dec. 3. ’02 Preliminary 1.1 DC Spec.변경 Apr. 21. ‘03 This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not

Contextual Info: HY64LD16322M Series Document Title 2M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul.18. ‘ 01 Preliminary Oct. 06. ’ 01

Contextual Info: HY64UD16322M Series Document Title 2M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul. 18. ’ 01 Preliminary Oct. 06. ’ 01

VL15

Contextual Info: HY64UD16162M Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul.18. ’ 01 Preliminary Oct. 07. ‘ 01