MARKING CODE E2 LOGIC GATE Search Results

74LVC2G86

Abstract: NC7WP86 NC7WZ86 NL27WZ86 SN74AUC2G86 SN74LVC2G86 SN74AUC2G86DCTR NXP lot marking
Contextual Info: SLG74LB2G86 GreenLIBTM DUAL 2-INPUT EXCLUSIVE-OR GATE General Description Features The GreenLIB provides the dual 2-input Exclusive-OR • Pb-Free / RoHS Compliant function. • Halogen-Free • TDFN-8 Package • Low static power consumption IDD = 1A •

marking code E2 logic gate

Abstract: SN74LVC3G04DCUR 74AUP3G04 74LVC3G04 NC7NP04 NC7NZ04 NL37WZ04 SN74LVC3G04 "MARKING CODE" 3Y
Contextual Info: SLG74LB3G04 GreenLIBTM TRIPLE INVERTER GATE General Description Features The GreenLIB provides the triple inverter gate. This device is • Pb-Free / RoHS Compliant fully specified for partial-power-down applications using Ioff. • Halogen-Free The Ioff circuitry disables the outputs, preventing damaging

NC7NZ34K8

Abstract: 74LVC3G34 NC7NP34 NC7NZ34 SN74AUP3G34 SN74LVC3G34 "MARKING CODE" 3Y SN74LVC3G34DCTR
Contextual Info: SLG74LB3G34 GreenLIBTM TRIPLE BUFFER GATE General Description Features The GreenLIB provides the triple buffer gate. This device is • Pb-Free / RoHS Compliant fully specified for partial-power-down applications using Ioff. • Halogen-Free The Ioff circuitry disables the outputs, preventing damaging

74AUP2G38

Abstract: 74LVC2G38 NC7WZ38 NC7WZ38K8X NC7WZ38L8X SN74LVC2G38
Contextual Info: SLG74LB2G38 GreenLIBTM DUAL 2-INPUT NAND GATE WITH OPEN DRAIN OUTPUT General Description Features The GreenLIB provides the dual 2-input NAND function with • Pb-Free / RoHS Compliant open drain outputs. • Halogen-Free • TDFN-8 Package • Low static power consumption IDD = 1A

74AUP2G00

Abstract: 74LVC2G00 NC7WP00 NC7WZ00 NL27WZ00 SN74AUC2G00 SN74AUP2G00 SN74LVC2G00 74aup2g00dc
Contextual Info: SLG74LB2G00 GreenLIBTM DUAL 2-INPUT NAND GATE General Description The GreenLIB provides the dual 2-input NAND function. Features • Pb-Free / RoHS Compliant • Halogen-Free This device ensures a very low static and dynamic • TDFN-8 Package power • Low static power consumption IDD = 1A

ta 8268

Abstract: SN74AUC2G02DCUR 74AUP2G02 74LVC2G02 NC7WP02 NC7WZ02 NL27WZ02 SN74AUC2G02 SN74AUP2G02 SN74LVC2G02
Contextual Info: SLG74LB2G02 GreenLIBTM DUAL 2-INPUT NOR GATE General Description The GreenLIB provides the dual 2-input NOR function. Features • Pb-Free / RoHS Compliant • Halogen-Free This device ensures a very low static and dynamic • TDFN-8 Package power • Low static power consumption IDD = 1A

NC7WP32L8X

Abstract: SLG74LB2G32 74LVC2G32 74AUP2G32 NC7WP32 NC7WZ32 NL27WZ32 SN74AUC2G32 SN74AUP2G32 SN74LVC2G32
Contextual Info: SLG74LB2G32 GreenLIBTM DUAL 2-INPUT OR GATE General Description The GreenLIB provides the dual 2-input OR function. This device ensures a very low static and dynamic power consumption. Output Summary • Features • Pb-Free / RoHS Compliant • Halogen-Free

NC7WZ08L8X

Abstract: SN74AUC2G08DCTR NL27WZ08USG 74AUP2G08 74LVC2G08 NC7WP08 NC7WZ08 NL27WZ08 SN74AUC2G08 SN74AUP2G08
Contextual Info: SLG74LB2G08 GreenLIBTM DUAL 2-INPUT AND GATE General Description Features function. • Pb-Free / RoHS Compliant Schmitt-trigger action at all inputs makes the circuit tolerant • Halogen-Free to slower input rise and fall times. • TDFN-8 Package • Low static power consumption IDD = 1A

74AUP2G132DC

Abstract: NC7WZ132 NC7WZ132K8X NC7WZ132L8X SN74LVC2G132
Contextual Info: SLG74LB2G132 GreenLIBTM DUAL 2-INPUT NAND GATE WITH SCHMITT TRIGGER INPUTS General Description Features The GreenLIB provides the dual 2-input NAND function with • Pb-Free / RoHS Compliant Schmitt trigger. Schmitt-trigger action at all inputs makes the •

Silego Technology

Abstract: NL27WZ125USG NC7WZ125 SN74LVC2G125DCTR 74AUP2G125 74LVC2G125 NC7WP125 SN74AUC2G125 SN74AUP2G125 SN74LVC2G125
Contextual Info: SLG74LB2G125 GreenLIBTM DUAL BUS BUFFER GATE WITH TRI-STATE OUTPUTS General Description Features The GreenLIB provides the dual bus buffer gate with tri-state • Pb-Free / RoHS Compliant outputs. The tri-state outputs are controlled by the output • Halogen-Free

Silego Technology

Abstract: NC7WZ126 74AUP2G126 74LVC2G126 NL27WZ126 SN74AUC2G126 SN74AUP2G126 SN74LVC2G126 marking NX texas datecode
Contextual Info: SLG74LB2G126 GreenLIBTM DUAL BUS BUFFER GATE WITH TRI-STATE OUTPUTS General Description Features The GreenLIB provides the dual bus buffer gate with tri-state • Pb-Free / RoHS Compliant outputs. The tri-state outputs are controlled by the output • Halogen-Free

1y a1

Abstract: 74AUP1G885 74AUP1G885DC 74AUP1G885GM 74AUP1G885GT
Contextual Info: SLG74LB1G885 GreenLIBTM DUAL FUNCTION GATE General Description Features The GreenLIB provides two functions in one device. The • Pb-Free / RoHS Compliant output state of the outputs 1Y, 2Y is determined by the • Halogen-Free inputs (A, B and C). The output 1Y provides the Boolean

application note for STGIPL14K60

Abstract: GIPL14K60 STGIPL14K60 NTC SD-15 ST IGBT code marking thermistor 054 SR1018
Contextual Info: STGIPL14K60 600 V, 14 A SDIP 38L molded IGBT intelligent power module Preliminary data Features • 600 V, 14 A 3-phase IGBT inverter bridge including control ICs for gate driving and freewheeling diodes ■ 3.3 V, 5 V, 15 V CMOS/TTL inputs comparators with hysteresis

Si3460-EVB

Abstract: qfn 3x3 dc-dc Si3460 TLV431 transistor marking code D8 SI3460-E02 "power sourcing equipment" "power injector"
Contextual Info: Si3460 IEEE 802.3af PSE INTERFACE AND DC-DC CONTROLLER Features 11 Si3460 GATE 1 10 CTRL1 2 9 ISENSE VDD 3 8 RST CTRL2 4 7 VSENSE 250KHZ 5 6 DETA GND STATUS 11 3-point detection algorithm eliminates false detection events IEEE-compliant classification

VHC138G

Contextual Info: MC74VHC138 3-to-8 Line Decoder The MC74VHC138 is an advanced high speed CMOS 3−to−8 decoder fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

Contextual Info: MC74VHC138 3-to-8 Line Decoder The MC74VHC138 is an advanced high speed CMOS 3−to−8 decoder fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

Contextual Info: MM5483 www.ti.com SNLS368E – JULY 2000 – REVISED MARCH 2013 MM5483 Liquid Crystal Display Driver Check for Samples: MM5483 FEATURES DESCRIPTION • • • • • • • The MM5483 is a monolithic integrated circuit utilizing CMOS metal-gate low-threshold enhancement mode

Contextual Info: MM5483 www.ti.com SNLS368E – JULY 2000 – REVISED MARCH 2013 MM5483 Liquid Crystal Display Driver Check for Samples: MM5483 FEATURES DESCRIPTION • • • • • • • The MM5483 is a monolithic integrated circuit utilizing CMOS metal-gate low-threshold enhancement mode

Contextual Info: 74LVC1G00 SINGLE 2 INPUT POSITIVE NAND GATE Description Pin Assignments Top View The 74LVC1G00 is a single 2-input positive NAND gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V

Contextual Info: 74AUP1G09 SINGLE 2 INPUT POSITIVE AND GATE WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable ( Top View ) applications. ( Top View ) 5 Vcc

Contextual Info: 74AUP1G34 SINGLE BUFFER GATE Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed ( Top View ) for low power and extended battery life in portable applications. ( Top View ) NC 1 The 74AUP1G34 is a single buffer gate with a standard push-pull

Contextual Info: 74AUP1G07 SINGLE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed ( Top View ) for low power and extended battery life in portable applications. ( Top View ) The 74AUP1G07 is a single buffer gate with an open drain output

Contextual Info: 74AUP1G04 SINGLE INVERTER GATE Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable ( Top View ) applications. ( Top View ) 5 Vcc NC 1 The 74AUP1G04 is a single inverter gate with a standard push-pull

Contextual Info: FDD6035AL N-Channel, Logic Level, PowerTrench MOSFET General Description Features This N-Channel Logic level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on state resistance and yet maintain low gate charge for superior