MARKING CODE D7B 10 LEAD Search Results

gmm-u1

Abstract: TS01 1005 8X320 TS01 au dma hin tv
Contextual Info: ± R E V IS IO N S LTR DESCRIPTION DATE A Table I, change parameter Icc• Figure 1, change to case outline U. Change vendor FSCM to vendor CAGE. APPROVED 18 May 87 tm iC JL . REV PACE REV STATUS REV A OP PASES PASES 1 2 Defens« Electronics Supply Center

Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Correct notes 4 and 5 of table I. Correct table II subgroups for final electrical and Group A test requirements. Update figure 1, case outline X. Update drawing boilerplate. Editorial changes throughout.

qml-38535

Abstract: 54F109 CQCC1-N20 GDFP2-F16 GDIP1-T16
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET 15 REV STATUS OF SHEETS PMIC N/A REV SHEET 1 2 4 3 PREPARED BY RICK OFFICER STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE

2144C

Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth -3 dB 1 GSPS (min) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 GSPS, FIN = 20 MHz

atmel 0825 G

Abstract: 2-CQFP CQFP68 JTS8388B TS81102G0 TS8388B TS8388BG atmel Reflow soldering
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth -3 dB 1 GSPS (min) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 GSPS, FIN = 20 MHz

CQFP68

Contextual Info: TS8388B ADC 8-bit 1 Gsps Datasheet 1. Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth –3 dB 1 Gsps (min.) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 Gsps, FIN = 20 MHz

NPN Two monolithic transistors

Abstract: d5 diod CQFP68 JTS8388B TS81102G0 TS8388B TS8388BG DIOD B4 85116
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth -3 dB 1 GSPS (min) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 GSPS, FIN = 20 MHz

DAC5675aMHFG-V

Contextual Info: DAC5675A-SP www.ti.com SGLS387E – JULY 2007 – REVISED APRIL 2013 CLASS V, 14-BIT, 400-MSPS DIGITAL-TO-ANALOG CONVERTER Check for Samples: DAC5675A-SP FEATURES • • • • • • 1 • • • • • 400-MSPS Update Rate LVDS-Compatible Input Interface

Contextual Info: DAC5675A-SP www.ti.com SGLS387F – JULY 2007 – REVISED JANUARY 2014 CLASS V, 14-BIT, 400-MSPS DIGITAL-TO-ANALOG CONVERTER Check for Samples: DAC5675A-SP FEATURES 1 • • • • • • • • • • • 400-MSPS Update Rate LVDS-Compatible Input Interface

Contextual Info: DAC5675 SLAS352C − DECEMBER 2001 − REVISED AUGUST 2004 14ĆBIT, 400ĆMSPS DIGITAL-TO-ANALOG CONVERTER FEATURES D 400-MSPS Update Rate D LVDS-Compatible Input Interface D Spurious Free Dynamic Range SFDR to D D D D D D Nyquist − 69 dBc at 70-MHz IF, 400 MSPS

Contextual Info: DAC5675-EP www.ti.com SGLS285 – AUGUST 2005 14-Bit, 400 MSPS Digital-to-Analog Converter FEATURES • • • • • • • • 400-MSPS Update Rate Controlled Baseline – One Assembly – One Test Site – One Fabrication Site Extended Temperature Performance of -55°C

Contextual Info: DAC5675A www.ti.com SBAS334A – NOVEMBER 2004 – REVISED FEBRUARY 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

Contextual Info: DAC5675A www.ti.com SBAS334C – NOVEMBER 2004 – REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

Contextual Info: DAC5675A www.ti.com SBAS334C – NOVEMBER 2004 – REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

Contextual Info: DAC5675-EP www.ti.com SGLS285 – AUGUST 2005 14-Bit, 400 MSPS Digital-to-Analog Converter FEATURES • • • • • • • • 400-MSPS Update Rate Controlled Baseline – One Assembly – One Test Site – One Fabrication Site Extended Temperature Performance of -55°C

DAC5675A

Contextual Info: DAC5675A www.ti.com SBAS334B – NOVEMBER 2004 – REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

E21V

Abstract: E01V
Contextual Info: Main Features • • • • • • • • • • • • 8-bit Resolution 500 Msps min Sampling Rate Power Consumption: 3.8W Typ 500 mVpp Differential or Single-ended Analog Inputs Differential or Single-ended 50Ω ECL Compatible Clock Inputs ECL or LVDS/HSTL Output Compatibility

Contextual Info: DAC5675-EP www.ti.com SGLS285 – AUGUST 2005 14-Bit, 400 MSPS Digital-to-Analog Converter FEATURES • • • • • • • • 400-MSPS Update Rate Controlled Baseline – One Assembly – One Test Site – One Fabrication Site Extended Temperature Performance of -55°C

DAC5675A-SP

Abstract: DAC5675A DAC5675AIPHP IS-136
Contextual Info: DAC5675A www.ti.com SBAS334C – NOVEMBER 2004 – REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

201MHz

Contextual Info: DAC5675A www.ti.com SBAS334C – NOVEMBER 2004 – REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

DAC5675AWHFG-V

Contextual Info: Product Folder Sample & Buy Technical Documents Support & Community Tools & Software DAC5675A-SP SGLS387G – JULY 2007 – REVISED MARCH 2015 DAC5675A-SP Radiation-Tolerant, 14-Bit, 400-MSPS Digital-to-Analog Converter 1 Features 3 Description • The DAC5675A-SP is a radiation-tolerant, 14-bit

marking D1G

Abstract: d9d marking code
Contextual Info: ADS5122 AD S51 22 SBAS272B – MAY 2003 – REVISED JUNE 2004 8-Channel, 10-Bit, 65MSPS, 1.8V CMOS ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● 8 DIFFERENTIAL ANALOG INPUTS The ADS5122 is a low-power, 8-channel, 10-bit, 65MSPS CMOS Analog-to-Digital Converter ADC that operates from

ADS5122

Abstract: ADS5122CGHK OPA355 OPA634 OPA635 OPA690 marking D3G D8G marking marking D9D marking code D9E
Contextual Info: ADS5122 AD S51 22 SBAS272A – MAY 2003 8-Channel, 10-Bit, 65MSPS, 1.8V CMOS ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● 8 DIFFERENTIAL ANALOG INPUTS The ADS5122 is a low-power, 8-channel, 10-bit, 65MSPS CMOS Analog-to-Digital Converter ADC that operates from

ADS5122

Abstract: ADS5122CGHK OPA355 OPA634 OPA635 OPA690 bga080 d6e marking
Contextual Info: ADS5122 AD S51 22 SBAS272A – MAY 2003 8-Channel, 10-Bit, 65MSPS, 1.8V CMOS ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● 8 DIFFERENTIAL ANALOG INPUTS The ADS5122 is a low-power, 8-channel, 10-bit, 65MSPS CMOS Analog-to-Digital Converter ADC that operates from