MARKING CODE D7B 10 LEAD Search Results

gmm-u1

Abstract: TS01 1005 8X320 TS01 au dma hin tv
Contextual Info: ± R E V IS IO N S LTR DESCRIPTION DATE A Table I, change parameter Icc• Figure 1, change to case outline U. Change vendor FSCM to vendor CAGE. APPROVED 18 May 87 tm iC JL . REV PACE REV STATUS REV A OP PASES PASES 1 2 Defens« Electronics Supply Center

5962-9961601HXA

Abstract: QML-38534 AD10465BZ D11A D12A Analog devices marking Information ADM marking code d7b 10 lead 5962-996160
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET REV STATUS REV OF SHEETS SHEET PMIC N/A PREPARED BY Gary Zahn STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE

qml-38534

Contextual Info: REVISIONS LTR DESCRIPTION A DATE YR-MO-DA APPROVED 02-04-10 Raymond Monnin Table I, change limits for SFDR, subgroups 4, 5, and 6 at 21 MHz, SINAD, subgroups 4, 5, and 6 at 21 MHz, and IMD, subgroups 4, 5, and 6. REV SHEET REV SHEET REV STATUS REV A A A

QML-38534

Abstract: D10A D11A MIL-PRF-38534
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET REV STATUS REV OF SHEETS SHEET PMIC N/A PREPARED BY Gary Zahn STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE

Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Correct notes 4 and 5 of table I. Correct table II subgroups for final electrical and Group A test requirements. Update figure 1, case outline X. Update drawing boilerplate. Editorial changes throughout.

qml-38535

Abstract: 54F109 CQCC1-N20 GDFP2-F16 GDIP1-T16
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET 15 REV STATUS OF SHEETS PMIC N/A REV SHEET 1 2 4 3 PREPARED BY RICK OFFICER STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE

Contextual Info: TS8388B ADC 8-bit 1 Gsps Datasheet 1. Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth –3 dB 1 Gsps (min.) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 Gsps, FIN = 20 MHz

2144C

Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth -3 dB 1 GSPS (min) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 GSPS, FIN = 20 MHz

DIOD MARKING CODE f2

Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth -3 dB 1 GSPS (min) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 GSPS, FIN = 20 MHz

atmel 0825 G

Abstract: 2-CQFP CQFP68 JTS8388B TS81102G0 TS8388B TS8388BG atmel Reflow soldering
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth -3 dB 1 GSPS (min) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 GSPS, FIN = 20 MHz

CQFP68

Contextual Info: TS8388B ADC 8-bit 1 Gsps Datasheet 1. Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth –3 dB 1 Gsps (min.) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 Gsps, FIN = 20 MHz

NPN Two monolithic transistors

Abstract: d5 diod CQFP68 JTS8388B TS81102G0 TS8388B TS8388BG DIOD B4 85116
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • 8-bit Resolution ADC Gain Adjust 1.5 GHz Full Power Input Bandwidth -3 dB 1 GSPS (min) Sampling Rate SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc, at FS = 1 GSPS, FIN = 20 MHz

Contextual Info: DAC5675A www.ti.com SBAS334C – NOVEMBER 2004 – REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

DAC5675aMHFG-V

Contextual Info: DAC5675A-SP www.ti.com SGLS387E – JULY 2007 – REVISED APRIL 2013 CLASS V, 14-BIT, 400-MSPS DIGITAL-TO-ANALOG CONVERTER Check for Samples: DAC5675A-SP FEATURES • • • • • • 1 • • • • • 400-MSPS Update Rate LVDS-Compatible Input Interface

motorola analog ICs vol.1

Abstract: 45fs 500MSPS JTS8308500 TS81102G0 TS8308500 TSEV8308500G atmel 0825 G
Contextual Info: MAIN FEATURES ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! 8-bit resolution. 500 Msps min sampling rate. 1.3 GHz full power input bandwidth. Band Flatness: TBD Input VSWR (packaged device): TBD SINAD = 45 dB (7.2 Effective Bits), SFDR = 54 dBc @ FS = 500 Msps, FIN = 20 MHz :

Contextual Info: DAC5675 SLAS352C − DECEMBER 2001 − REVISED AUGUST 2004 14ĆBIT, 400ĆMSPS DIGITAL-TO-ANALOG CONVERTER FEATURES D 400-MSPS Update Rate D LVDS-Compatible Input Interface D Spurious Free Dynamic Range SFDR to D D D D D D Nyquist − 69 dBc at 70-MHz IF, 400 MSPS

Contextual Info: DAC5675A-SP www.ti.com SGLS387E – JULY 2007 – REVISED APRIL 2013 CLASS V, 14-BIT, 400-MSPS DIGITAL-TO-ANALOG CONVERTER Check for Samples: DAC5675A-SP FEATURES • • • • • • 1 • • • • • 400-MSPS Update Rate LVDS-Compatible Input Interface

DAC5675aMHFG-V

Abstract: DAC5675AMHFG DAC5675AHFGMPR
Contextual Info: DAC5675A-SP www.ti.com SGLS387E – JULY 2007 – REVISED APRIL 2013 CLASS V, 14-BIT, 400-MSPS DIGITAL-TO-ANALOG CONVERTER Check for Samples: DAC5675A-SP FEATURES • • • • • • 1 • • • • • 400-MSPS Update Rate LVDS-Compatible Input Interface

Contextual Info: DAC5675-EP www.ti.com SGLS285 – AUGUST 2005 14-Bit, 400 MSPS Digital-to-Analog Converter FEATURES • • • • • • • • 400-MSPS Update Rate Controlled Baseline – One Assembly – One Test Site – One Fabrication Site Extended Temperature Performance of -55°C

DAC5675A

Abstract: DAC5675AIPHP IS-136
Contextual Info: DAC5675A www.ti.com SBAS334A – NOVEMBER 2004 – REVISED FEBRUARY 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

Contextual Info: DAC5675A www.ti.com SBAS334A – NOVEMBER 2004 – REVISED FEBRUARY 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

Contextual Info: DAC5675A www.ti.com SBAS334C – NOVEMBER 2004 – REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

DAC5675A

Abstract: DAC5675AIPHP IS-136 400MSPS
Contextual Info: DAC5675A www.ti.com SBAS334C – NOVEMBER 2004 – REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist:

Contextual Info: DAC5675A www.ti.com SBAS334C – NOVEMBER 2004 – REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES • • • • • • • • • 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range SFDR to Nyquist: