MARKING 303 Search Results

117MAABW

Abstract: 117M14BW 117MCCBW
Contextual Info: 3M Grafoplast™ TRASP System Durable Custom Identification For years, 3M has provided a variety of reliable solutions for wire marking and identification. Now 3M is introducing a new manual marking and identification system – from Grafoplast, a 3M company – for creating custom labels for

M74VHC1GT125DF1G

Abstract: M74VHC1GT125DF2G M74VHC1GT125DT M74VHC1GT125
Contextual Info: MC74VHC1GT125 Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs http://onsemi.com MARKING DIAGRAMS 5 5 1 M The MC74VHC1GT125 is a single gate noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed

MOTOROLA LOT MARKINGS

Abstract: On semiconductor date Code IC Lot Code Identification marking code 6L QFN tray qfn 4x4 AND8002 ase qfn unisem QFN marking code onsemi Diode on alpha year and work week
Contextual Info: AND8002/D Clock Generation and Clock and Data Marking and Ordering Information Guide http://onsemi.com Prepared by: Paul Shockman ON Semiconductor APPLICATION NOTE Introduction This application note describes the device markings and ordering information for the following ON Semiconductor

A114

Abstract: NL27WZ04 NL27WZ14
Contextual Info: NL27WZ14 Dual Schmitt−Trigger Inverter http://onsemi.com MARKING DIAGRAMS 6 6 M The NL27WZ14 is a high performance dual inverter with Schmitt−Trigger inputs operating from a 1.65 to 5.5 V supply. Pin configuration and function are the same as the NL27WZ04, but

NB7L14MMNG

Contextual Info: NB7L14M 2.5V/3.3V Differential 1:4 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination http://onsemi.com MARKING DIAGRAM* Description The NB7L14M is a differential 1−to−4 clock/data distribution chip with internal source terminated CML output structures, optimized for

TND309

Abstract: MC10H424 MC10H424FN MC10H424FNG MC10H424FNR2 MC10H424FNR2G MC10H424P
Contextual Info: MC10H424 Quad TTL to ECL Translator with ECL Strobe Description The MC10H424 is a Quad TTL−to−ECL translator with an ECL strobe. Power supply requirements are ground, +5.0 V, and −5.2 V. http://onsemi.com Features MARKING DIAGRAMS* • Propagation Delay, 1.5 ns Typical

KLT23

Abstract: MC100ELT23
Contextual Info: MC100ELT23 5 V Dual Differential PECL to TTL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 1 Features • • • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Outputs Flow Through Pinouts The 100 Series Contains Temperature Compensation

523AN

Abstract: PCA9306 PCA9306DTR2G UDFN-8 PCA9306USG
Contextual Info: PCA9306 Dual Bidirectional I2C-bus and SMBus Voltage-Level Translator The PCA9306 is a dual bidirectional I2C−bus and SMBus voltage−level translator with an enable EN input. http://onsemi.com Features MARKING DIAGRAMS • 2−bit Bidirectional Translator for SDA and SCL Lines in

Contextual Info: MC74VHC1GT04 Inverting Buffer / CMOS Logic Level Shifter LSTTL−Compatible Inputs Features • • • • • • • • • High Speed: tPD = 3.8 ns Typ at VCC = 5 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C http://onsemi.com MARKING DIAGRAMS

AAAA series SMD transistor

Abstract: CS5233-3 936F smd marking AAAA
Contextual Info: CS5233-3 500 mA and 1.5 A, 3.3 V Dual Input Linear Regulator with Auxiliary Control http://onsemi.com D2PAK 5–PIN DP SUFFIX CASE 936F 1 5 1 PIN CONNECTIONS AND MARKING DIAGRAMS  Semiconductor Components Industries, LLC, 2001 May, 2001 – Rev. 5 Pin 1. VSB

MAX3840

Abstract: NB4N840M QFN32 SY55859L
Contextual Info: NB4N840M 3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination http://onsemi.com MARKING DIAGRAM Description The NB4N840M is a high−bandwidth fully differential dual 2 x 2 crosspoint switch with CML inputs/outputs that is suitable for

MAX3840

Abstract: NB4N840M QFN32 SY55859L NB4N840MMNG
Contextual Info: NB4N840M 3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination http://onsemi.com MARKING DIAGRAM Description The NB4N840M is a high−bandwidth fully differential dual 2 x 2 crosspoint switch with CML inputs/outputs that is suitable for

HCT541A

Abstract: LS541 MC74HCT541A MC74HCT541ADW MC74HCT541ADWR2 MC74HCT541AN
Contextual Info: MC74HCT541A Octal 3-State Non-Inverting Buffer/Line Driver/ Line Receiver With LSTTL-Compatible Inputs High–Performance Silicon–Gate CMOS http://onsemi.com MARKING DIAGRAMS The MC74HCT541A is identical in pinout to the LS541. This device may be used as a level converter for interfacing TTL or NMOS

NLVVHC1G

Contextual Info: MC74VHC1GT126 Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs http://onsemi.com MARKING DIAGRAMS 5 5 1 SC−88A / SOT−353 / SC−70 DF SUFFIX CASE 419A M The MC74VHC1GT126 is a single gate noninverting 3−state buffer fabricated with silicon gate CMOS technology. It achieves high speed

PSOP-20

Abstract: CS8361 CS8361YDPS7 CS8361YDPSR7 CS8361YDWF16 CS8361YDWFR16
Contextual Info: CS8361 5.0 V Dual Micropower Low Dropout Regulator with ENABLE and RESET SO–16L DW SUFFIX CASE 751G 16 1 D2PAK 7–PIN DPS SUFFIX CASE 936H 1 7 PIN CONNECTIONS AND MARKING DIAGRAM 1 VIN NC VTRK GND GND Adj NC ENABLE CS8361 Features • 2 Regulated Outputs

Contextual Info: CDU CMBT5551 SILICON N -P -N HIGH-VOLTAGE TRANSISTOR N-P-N transistor Marking CMBT5551 = GI PACKAGE OUTLINE DETAILS ALL DIMENSIONS IN nun 3.0 2 . 8" 0.-14 0.48 0.38 -| ÍT 0 § 0.70 0.50 3 Pin configuration 1 = BASE 2 = EMITTER 3 = COLLECTOR 2.6 1.4 2.4 1.2

Contextual Info: NLSX5011 1-Bit 100 Mb/s Configurable Dual-Supply Level Translator http://onsemi.com MARKING DIAGRAMS M E ULLGA6, 1.2x1.0 BMX1 SUFFIX CASE 613AE E 1 ULLGA6, 1.45x1.0 AMX1 SUFFIX CASE 613AF M P M 1 1 1 UDFN6, 1.2 x 1.0 MU SUFFIX CASE 517AA UDFN6, 1.45 x 1.0

KEP32

Abstract: HEP32 HP32 MC100EP32 MC10EP32
Contextual Info: MC10EP32, MC100EP32 3.3V / 5V ECL B2 Divider Description • 350 ps Typical Propagation Delay • Maximum Frequency > 4 GHz Typical Figure 3 • PECL Mode Operating Range: • MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 1 8 8 1 VCC = 3.0 V to 5.5 V with VEE = 0 V

marking code v6 SOT23

Abstract: V6 marking code marking code V6 DIODE MC74VHC04 MC74VHC1G04 MC74VHC1GU04 MC74VHCU04 SC-88A inverter SOt23-5 footprint wave soldering
Contextual Info: MC74VHC1GU04 Single Unbuffered Inverter http://onsemi.com MARKING DIAGRAMS 5 5 1 SC−88A/SOT−353/SC−70 DF SUFFIX CASE 419A V6 M G G M The MC74VHC1GU04 is an advanced high speed CMOS Unbuffered inverter fabricated with silicon gate CMOS technology. This device consists of a single unbuffered inverter. In combination

HLT24

Abstract: MC100ELT24DG ELT24 HT24 KLT24 MC100ELT24 MC10ELT24 MC100ELT24DR2G
Contextual Info: MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator Description http://onsemi.com MARKING DIAGRAMS* 8 8 Features • • • • • 0.8 ns tPHL, 0.95 ns tPLH Typical Propagation Delay PNP TTL Inputs for Minimal Loading Flow Through Pinouts Operating Range: VCC = 4.5 V to 5.5 V; VEE = −4.2 V to −5.5 V with

SOT23-5 marking 016

Abstract: A114 A115 MC74VHC1GT02
Contextual Info: MC74VHC1GT02 Single 2−Input NOR Gate/ CMOS Logic Level Shifter LSTTL−Compatible Inputs MARKING DIAGRAMS 5 5 1 SC−88A/SC70−5/SOT−353 DF SUFFIX CASE 419A VJ M G G 1 5 5 VJ M G G 1 TSOP−5/SOT23−5/SC59−5 DT SUFFIX CASE 483 1 VJ = Device Code M

ELT25

Abstract: HLT25 HT25 KLT25 MC100ELT25 MC10ELT25
Contextual Info: MC10ELT25, MC100ELT25 −5 V Differential ECL to TTL Translator Description Features • • • MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 1 8 8 2.6 ns Typical Propagation Delay 100 MHz FMAX CLK 24 mA TTL Outputs Flow Through Pinouts Operating Range: VCC = 4.5 V to 5.5 V with GND = 0 V;

MC100EL32

Abstract: HEL32 KEL32 KL32 MC10EL32
Contextual Info: MC10EL32, MC100EL32 5V ECL ÷2 Divider Description Features • 510 ps Propagation Delay • 3.0 GHz Toggle Frequency • ESD Protection: > 1 kV Human Body Model, • • • MARKING DIAGRAMS* 8 1 SOIC−8 D SUFFIX CASE 751 8 1 > 100 V Machine Model PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V

A600

Abstract: PHOENIX ZB-16
Contextual Info: Extract from the online catalog ST 35 Order No.: 3036178 Spring-cage feed-through terminal block, Connection method: Springcage connection, Cross section: 2.5 mm² - 35 mm², AWG 14 - 2,