MANTIS Search Results

yamaha 3014b

Abstract: Yamaha YM3014B YM3014B 3014b YM3014B-F yamaha+3014b ym30 c14r MP15 yamaha YM
Contextual Info: YAMAHA L S I YM3014B Serial Input Floating D/A Converter DAC-SS • OUTLINE YM3014B: DAC-SS (hereinafter referred to as DAC) is a floating D/A converter with serial input for single channel. It can generate analog output (dynamic range 16 bits) having 10-bit mantissa section and 3-bit

amplifier CV 203

Abstract: 78x05 ymf271 YAC513M YAC513 CV 203 JRC OPamp YMF278 YAC513-M ymf*271
Contextual Info: YAMAHAL S i Y A C 5 13 2-Channel Floating D /A Converter •OUTLINE YAC513 is floating D/A converter with a 10-bit mantissa block and a 7-step exponent block, which generates analog output of 16-bit dynamic range. It is suitable for the stereo FM sound source

YAC512-M

Abstract: YAC512 amplifier CV 203 YAC512M YMF262 78x05 NJM4560 m552 Yamaha YMF262 NJM2100
Contextual Info: Y A M A H A ' ! . S I { Y A C 5 1 S 2 -C h a n n e l F lo a tin g D / A C o n v e r t e r • OUTLINE The YAC512 is a floating D/A converter with 10-bit mantissa and 7-step exponent. It can produce analog output of 16-bit dynamic range. It is suitable for YMF262 OPL3 and other stereo sound source LSI.

16 bit multiplier VERILOG

Abstract: 8-bit multiplier VERILOG diagram for 4 bits binary multiplier circuit vhdl diagram for 4 bits binary multiplier circuit 5 bit binary multiplier 8 bit multiplier VERILOG 64 bit multiplier VERILOG 4 bit binary multiplier 8046 binary multiplier
Contextual Info: fp_mult Floating-Point Multiplier January 1996, ver. 1 Features Functional Specification 4 • ■ ■ ■ ■ ■ General Description fp_mult reference design implementing a floating-point multiplier Parameterized mantissa and exponent bit widths Optimized for FLEX 10K and FLEX 8000 device families

VR4300

Abstract: VR4102 VR4100 28mmx28mm MIPS data bus
Contextual Info: F E AT U R E D E S C R I P T I O N Execution Unit — 64-bit register file — 64-bit integer/mantissa data bus — 12-bit exponent data bus VR 4 3 0 0 6 4 - B I T M I P S R I S C M I C R O P R O C E S S O R Co-Processor — Exception processing unit with system control co-processor registers

ADSP-21065L

Contextual Info: & 180 5,& 250$76 Figure C-0. Table C-0. Listing C-0. The processor supports several numeric formats: • IEEE Standard 754/854, 32-bit, single-precision floating-point format. • An extended-precision version of the 32-bit, single-precision floating-point format that has eight additional bits in the mantissa (40

YM3025

Abstract: ym30
Contextual Info: D /A CONVERTER 2-Channel 2’s complement MSB 1st input Floating D / A Converter YM 30S5 □AC CD •OUTLINE The YM3025 is a floating D /A converter with the 2-channel serial and 16-bit 2’s complement input. It can produce anglog output (16-bit dynamic range) which has 10-bit mantissa and

am2903adc

Abstract: Am2903A S1038 am29705
Contextual Info: VC06ZUIV Am2903A Four-Bit Bipolar Microprocessor Slice DISTINCTIVE CHARACTERISTICS Expandable Register File - Built-In Normalization Logic - The Am2903A includes the necessary "hooks" to expand the register file externally to any number of registers. The mantissa and exponent of a floating-point num­

dts circuit board

Abstract: Dolby Digital / DTS decoder 7.1 surround sound dolby circuits dts decoder Surround processor schematic Dolby 7.1 DSP DTS aac decoder surround dts decoder dolby digital dts decoder
Contextual Info: Melody SHARC® DSP Based Audio Encoders/Decoders/Virtualizers ENCODED INCOMING BIT STREAM Features FRAME SYNCHRONIZATION, ERROR DETECTION, AND FRAME DEFORMATTING ENCODED SPECTRAL ENVELOPE BIT ALLOCATION INFORMATION BIT ALLOCATION QUANTIZED MANTISSAS MANTISSA

YM3014B

Abstract: ym3014 Yamaha YM3014B YM3014B-F Yamaha ym30 YM301 YM3014BF
Contextual Info: YA M AH A* L S I YM3014B Serial Input Floating D/A Converter DAC-SS • OUTLINE YM3014B: DAC-SS (hereinafter referred to as DAC) is a floating D/A converter with serial input for single channel. It can generate analog output (dynamic range 16 bits) having 10-bit mantissa section and 3-bit

surround dts decoder

Abstract: hdcd DSP DTS Surround processor schematic 80C31 ADSST-21161N 5.1 surround Processor DOLBY DIGITAL 5.1 DECODERS AND ENCODERS
Contextual Info: Melody SHARC® DSP-Based Audio Encoders/Decoders/Virtualizers ENCODED INCOMING BITSTREAM FRAME SYNCHRONIZATION, ERROR DETECTION, AND FRAME DEFORMATTING ENCODED SPECTRAL ENVELOPE BIT ALLOCATION INFORMATION BIT ALLOCATION QUANTIZED MANTISSAS MANTISSA REQUANTIZATION

AN1017

Abstract: nDSP Corporation 68MH ISL5217 ISL5217EVAL ISL5416 31-TAP-HBF barrel shifter block diagram x band receiver MDS dbM Honeywell DBM 01
Contextual Info: A/D Range Control Using the ISL5416 3G QPDC Application Note May 2002 AN1017 Intersil CommLink Applications Overview: and the A/D output thought of as the mantissa. The ISL5416 requires that the gain adjustments be in 6 dB increments though in general, floating-point digitizers can use any

Everything you need in a CAN transceiver

Contextual Info: NXP MantisTM CAN transceivers for 12 V automotive applications Everything you need in a CAN transceiver Offering an optimized feature set, benchmark emissions performance even without a common-mode choke , dual-sourced manufacturing base, and high-end variants for CAN

AHDL adder subtractor

Abstract: 8 bit adder and subtractor adder-subtractor design AHDL subtractor 8 bit adder floating point verilog 4-bit AHDL adder subtractor AHDL adder
Contextual Info: fp_add_sub Floating-Point Adder/Subtractor January 1996, ver. 1 Features Functional Specification 2 • ■ ■ ■ ■ General Description fp_add_sub reference design implementing a floating-point adder/subtractor Parameterized mantissa and exponent widths

MN5420

Abstract: hanning
Contextual Info: MN5420 Æ K ÏÏ Micro Networks A DIVISION OF U N I T M O I 20-Bit DYNAMIC RANGE FLOATING-POINT A/D CONVERTER CORPORATION DESCRIPTION • 320kHz Conversion Rate • Floating-Point 16-Bit Output: 12-Bit Mantissa 4-Bit Exponent • 120dB Dynamic Range: 10V Input Range

DIV12

Abstract: DIV41 BBC STa ADIX
Contextual Info: MITSUBISHI MICROCOMPUTERS 740 Family Reference Programs 4.8 BCD 12-digit Floating Point Arithmetic Calculations 1 Description Arithmetic calculations for BCD 12-digit floating point numbers are performed. (2) Explanation The data format, as shown below, consists of two sections: the mantissa (7 bytes: 1 byte of sign bit,

singlestep

Abstract: atmel 68020 68030 cqfp 68000 thomson TS68882
Contextual Info: Features • Eight General Purpose Floating-point Data Registers, Each Supporting a Full 80-bit • • • • • • • • • • • • • • • • Extended Precision Real Data Format a 64-bit Mantissa Plus a Sign Bit, and a 15-bit Signed Exponent

TS68000 thomson

Abstract: atmel 748 TS68000 TS68882 TS68020 TS68881 PGA68 TS68008 TS68882mr16 TS68030
Contextual Info: Features • Eight General-purpose Floating-point Data Registers, Each Supporting a Full 80-bit • • • • • • • • • • • • • • • • Extended Precision Real Data Format a 64-bit Mantissa Plus a Sign Bit, and a 15-bit Signed Exponent

KU 607 VB

Abstract: la 1404 TE 1539
Contextual Info: T O S H IB A T7988,JT7988Y-AS TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T7988, JT7988Y-AS T7988, JT7988Y-AS CMOS 1 CHIP LSI FOR LCD ELECTRONIC CALCULATOR The T7988, JT7988Y-AS is a 1 chip microcomputer for 10digits + 2-digits electronic scientific calculator.

Contextual Info: CC1100 CC1100 Low-Power Sub- 1 GHz RF Transceiver Applications • Ultra low-power wireless applications operating in the 315/433/868/915 MHz ISM/SRD bands • Wireless alarm and security systems • Industrial monitoring and control • Wireless sensor networks

Contextual Info: S ta n d a r d P r o d u c t PM I T# I ISSUE 5 PMC-Sierra, Inc. P M 7 3 2 2 R C M P -8 0 0 ROUTING CONTROL, MONITORING AND POLICING 800 Mbps PM7322 RCMP-800 ROUTING ATM L A Y E R CONTROL, MONITORING AND POLICING 800 M b p s Issue PMC-Sierra, Inc. 5: May, 1996

cc1101, PA

Abstract: CC1101EM Murata GRM1555c CC11xx CC1101 application circuit and software A114 AN050 DN010 CC1101 AN047 cc1101
Contextual Info: CC1101 Low-Power Sub-1 GHz RF Transceiver Enhanced CC1100 Applications • Ultra low-power wireless applications operating in the 315/433/868/915 MHz ISM/SRD bands • Wireless alarm and security systems • Industrial monitoring and control • • •

80C32

Abstract: DS2502-E48 DS80C400 DS80C400-FNY J-STD-020A
Contextual Info: DS80C400 Network Microcontroller www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS80C400 network microcontroller offers the highest integration available in an 8051 device. Peripherals include a 10/100 Ethernet MAC, three serial ports, a CAN 2.0B controller, 1-Wire Master, and 64 I/O pins.

SAA7119

Abstract: saa7154 RSN 309 W 44H SAA7154H SAA7154E SAA7118 An RTCO 7AH SPLPL9 myson mtv048 SAA7154E/V2
Contextual Info: SAA7154E; SAA7154H Multistandard video decoder with comb filter, component input and RGB output Rev. 02 — 6 December 2007 Product data sheet 1. General description The SAA7154E; SAA7154H is a high-quality multistandard video decoder supporting 10-bit Analog-to-Digital Converter ADC , enhanced PAL/NTSC comb filtering, more