M80C Search Results

MD80C31BH

Abstract: MD80C31BH/B M80C31BH
Contextual Info: M80C51BH/M80C31BH CMOS SINGLE-CHIP 8-BIT MICROCOMPUTER Military m M80C31BH—Control Oriented CPU with • ■ ■ ■ ■ ■ ■ 64K Program Memory Space a High Performance CHMOS Process _ Boolean Processor S Interrupt Sources B Programmable Serial Port

m8087 intel

Contextual Info: p R iy iM O B y w in te i M80C187 80-BIT NUMERIC PROCESSOR EXTENSION Military High Perform ance 80-Bit Internal Architecture Tw o to Three Tim es M8087 Perform ance at Equivalent Clock Speed Im plements A N S I/IE E E Standard 7541985 fo r Binary Floating-Point

Contextual Info: in te l M80C51FB CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER MiHtary M80C51FB — 3.5 MHz to 12 MHz, VCc = 5V ± 10% M80C51FB-16 — 3.5 MHz to 16 MHz, Vcc = 5V ± 10% High Performance CHMOS EPROM 32 Programmable I/O Lines Three 16-Bit Timer/Counters 7 Interrupt Sources

Contextual Info: in tó l. M80C51FB CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER Mffltary M80C51FB — 3.5 MHz to 12 MHz, VCC = 5V ± 10% M80C51FB-16 — 3.5 MHz to 16 MHz, Vcc = 5V +10% High Performance CHMOS EPROM 32 Programmable I/O Lines Three 16-Bit Timer/Counters 7 Interrupt Sources

M80C

Abstract: M80-8880805 M80-8880405 m80-8881005 M22520/2 GO NO GO T5747 m80-888 C005XX
Contextual Info: DRAWING N o . : M80CI0837IC | IFIN D O U B T - ASK | c | NOT TO SCALE | 2.00 4-OFF STRANDED SILVE R PLATED COPPER TH E X T R U D E D T E F L O N I N S U L A T I O N . S P E C I F I C A T I O N : MI L - W- I 6 8 7 8 / 4 B D E- X (X DENOTES G A U G E : 26

Contextual Info: i i r t r J Ä i M @ l O M IF C O M A Y O !* ] M80C186XL20,16,12,10 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR Low Power, Full Static Version of M80C186 Operation Modes: — Enhanced Mode — DRAM Refresh Control Unit — Power-Save Mode — Direct Interface to 80C187

Contextual Info: intj, M80C51FB CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER Military M80C51FB — 3.5 MHz to 12 MHz, Vcc = 5V + 20% M80C51FB-16 — 3.5 MHz to 16 MHz, Vcc = 5V +20% • Three 16-Bit Timer/Counters ■ Programmable Clock Out ■ 32 Programmable I/O Lines ■ 7 Interrupt Sources

D1515

Abstract: Q1515 80c196 instruction intel 80c196 opcode sheet MTO spco
Contextual Info: PftSUBflO INM V M80C196KB 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER Military • 232 Byte Register File ■ Register-to-Register Architecture ■ 28 Interrupt Sources/16 Vectors ■ 2.3 us 16 x 16 Multiply 12 MHz ■ 4.0 us 32/16 Divide (12 MHz) ■ Powerdown and Idle Modes

JS4041

Abstract: 1nt08 M80C198KB h jst 03 intel 8096 assembly language 271060 271069 271088 CQFP24
Contextual Info: in t e i M80C196KB 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER M ilitary 232 B y te R e g is te r F ile • R e g is te r-to -R e g is te r A rc h ite c tu re ■ 28 In te rru p t S o u rc e s /1 6 V e c to rs F u ll D u p lex S e ria l P o rt H igh S peed I/O S u b syste m

M80C51F

Abstract: M80C5
Contextual Info: intJ. M80C51FB CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER Military M80C51FB — 3.5 MHz to 12 MHz, Vcc = 5V + 20% M80C51FB-16 — 3.5 MHz to 16 MHz, Vcc = 5V ± 20% • Three 16-Bit Timer/Counters ■ 32 Programmable I/O Lines ■ Programmable Clock Out ■ 7 Interrupt Sources

SAL 41B

Abstract: 8088 instruction set CTX 12S RD smd lm 398- SAMPLE AND HOLD
Contextual Info: Ä in te i I M K l l O M I F iO M A T O ! * ! M80C186XL20,16,12,10 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR • Low Power, Full Static Version of M80C186 ■ Operation Modes: — Enhanced Mode — DRAM Refresh Control Unit — Power-Save Mode — Direct Interface to 80C187

mg80c186

Abstract: 523ap order 231369 M801 80C186EB
Contextual Info: in te i M80C186EB-16, -13, -8 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR • Full Static Operation • True CMOS Inputs and Outputs • —55°C to + 125°C Operating Temperature Range • Integrated Feature Set — Low-Power Static CPU Core — Two Independent UARTs each with

M801

Abstract: M80C186
Contextual Info: M80C186 CHMOS HIGH INTEGRATION 16-BIT MICROPROCESSOR M ilitary • Direct Addressing Capability to 1 Mbyte and 64 Kbyte I/O ■ Operation Modes Include: — Enhanced Mode Which Has — DRAM Refresh — Power-Save Logic — Direct Interface to New CMOS Numerics Coprocessor

M80C51

Abstract: M80C51F 1-6 mhz oscillator M8051 data sheet M8051 M80C51FB M80C51FB-16 AP255 271172 AP-155
Contextual Info: M80C51FB CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER Military M80C51FB 3 5 MHz to 12 MHz VCC e 5V g 20% M80C51FB-16 3 5 MHz to 16 MHz VCC e 5V g 20% Y Three 16-Bit Timer Counters Y 32 Programmable I O Lines Y Programmable Clock Out Y 7 Interrupt Sources Y Programmable Counter Array with

Contextual Info: DRAWING N o .: Customer Information Sheet SHEET M80CI07422C ? OF 2 I IF IN DOUBT - ASK | SPECIFICATIONS: MATERIALS: M O U L D I N G = P O L Y M I D E 46 U L 9 4 V - 0 , B L A C K CO NT AC TS = BRASS M 2 . 5 JA CK SC RE W S, WASHERS AND NUTS : S T A I N L E S S S T E E L

Contextual Info: Customer Information Sheet DRAWING No.: T~ÎF SHEET 2 OF 2 M80CI09200C IN DOUBT - ASK I I NOT TO SCALE | THIRD ANGLE PROJECTION •30.0 1 SPECIFICATIONS: MATERIAL: MOULDING = G L A S S - FIL LED POLYAMIDE 46. UL94V-0, BLACK HEX JACKSCREW, CIRCLIP, BOARD MOUNT, NUT

Contextual Info: M80C186EB ERRATA REVISION HISTORY The current stepping B step of the M 80C186EB has the following known functional anomaly. The first revision of this data sheet (271214-001) in­ dicated only 8 MH z and 13 M H z availability. The M 80C 186EB will also be available in a 16 M H z ver­

Fortran-86

Abstract: intel 8088 memory 8088 instruction set intel 80186 memory map 80C186XL 80c187
Contextual Info: in te i Ä W Ä l O N IP Q IR G M irO lD N M80C186XL20,16,12,10 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR Low Power, Full Static Version of M80C186 Operation Modes: — Enhanced Mode — DRAM Refresh Control Unit — Power-Save Mode — Direct Interface to 80C187

001100dw

Contextual Info: M80C186EB INSTRUCTION SET SUMMARY Clock C yd— Format Comments DATA TRANSFER MOV = Move: Register to Register/Memory 1 0 0 Q1 QOw mod reg r/m 2/12 Register/memory to register 1000101w mod reg r/m 2/9 Immediate to register/memory 1 10001 1w mod 000 r/m data

ocs4

Contextual Info: M80C186EB PACKAGE INFORMATION This section describes the pins, pinouts, and thermal characteristics for the M80C186EB PGA package. For complete package specifications and informa­ tion, see the Intel Packaging Outlines and Dimen­ sions Guide Order Number: 231369 .

m80c85ah

Abstract: M82C51A-2 OKI M82C51a-2 M82C12 m82c55a-2 oki m82c55a-2 M82C88-2 m82c84a-2 M82C59A-2 80C88A-10
Contextual Info: PACKAGING PACKAGE/PIN COUNT PRO­ DUCTS PART NAME CPUs M 80C86A-10 DIP M80C85AH il/U /n 40 40 SOP SSOP - - M 80C88A-10 40 - - M 81C55-5 M82C12 40 - - 24 - M82C37B-5 M82C51A-2 M 82C53-2 40 28 24 24 - M 82C54-2 24 M82C55A-2 40 28 - 18 24 32 - 20 24 - M82C59A-2

Contextual Info: A Ë M M K S E Ü K IIF Û I^IÎÎIÂ T O Û G ÎÛ intei M80C286 HIGH PERFORMANCE CHMOS MICROPROCESSOR WITH MEMORY MANAGEMENT AND PROTECTION Military • High Speed CHMOS III Technology ■ 10 MHz Clock Rate ■ Pin for Pin, Clock for Clock, and ■ 68 Lead Pin Grid Array Package

Contextual Info: P H iy fiflD iw M n f in t e i M80C196KB 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER Military 232 Byte Register File Register-to-Reglster Architecture 28 Interrupt Sources/16 Vectors 2.3 jus 16 x 16 Multiply 12 MHz 4.0 (is 32/16 Divide (12 MHz) Powerdown and Idle Modes

Contextual Info: irrte! p f ö iy t M Ä f M80C196KB 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER Military • 232 Byte Register File ■ Register-to-Register Architecture ■ ■ ■ ■ ■ ■ ■ 28 Interrupt Sources/16 Vectors 2.3 jits 16 x 16 Multiply 12 MHz 4.0 ju-s 32/16 Divide (12 MHz)