M74HCT13 Search Results

Contextual Info: ¿57 M54HCT138 M74HCT138 SGS-THOMSON ¡y 3 TO 8 LINE DECODER INVERTING • HIGH SPEED tpo = 16 ns (TYP.) at Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 4 (iA AT Ta = 25 *C ■ OUTPUT DRIVE CAPABILITY 1 0 LSTTLLOADS ■ BALANCED PROPAGATION DELAYS tPLH = tP H L

st 74hct132

Abstract: 74hct132 M74HCT00 M74HCT132 M74HCT132B1R M74HCT132M1R truth table NAND gate 74 M74HCT13
Contextual Info: M74HCT132  QUAD 2-INPUT SCHMITT NAND GATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 20 ns TYP. at VCC = 4.5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS HIGH NOISE IMMUNITY VH (TYP.) = 0.71V AT VCC = 4.5V

Contextual Info: M74HCT138 3 TO 8 LINE DECODER INVERTING • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 16ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

EQUIVALENT 74HCT138

Abstract: T907 74HCT138 S-100-48 FUNCTIONAL APPLICATION OF 74LS138 G1.L 54HC 74HC M54HCT138 M74HCT138
Contextual Info: M54HCT138 M74HCT138 rZJ SGS -THOMSON RiOO [^@[i[L[lgT^ Q R!]ö(gS 3 TO 8 LINE DECODER LOW POWER DISSIPATION |cc = 4 aiA (MAX.) at TA = 25°C HIGH NOISE IMMUNITY Vnih = V N|L= 28% VCc (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

M74HCT13

Contextual Info: M54HCT137 M74HCT137 C T SGS-THOMSON ^ 7 # « 1 1 0 * E Œ ( g T ^ ( ô ) [fl S 3 TO 8 LINE DECODER/LATCH • LOW POWER DISSIPATION |c c = 4 /tA (MAX.) at Ta = 25°C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28% VCC (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

M74HCT00

Abstract: M74HCT132 M74HCT132B1R M74HCT132M1R M74HCT132RM13TR M74HCT132TTR 0336 diode
Contextual Info: M74HCT132 QUAD 2-INPUT SCHMITT NAND GATE • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 19ns TYP. at VCC = 4.5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY : VH = 0.7V (TYP) at Vcc = 4.5V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

M74HCT138

Abstract: M74HCT138B1R M74HCT138M1R M74HCT138RM13TR M74HCT138TTR PO13H TSSOP16
Contextual Info: M74HCT138 3 TO 8 LINE DECODER INVERTING • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 16ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

HC137

Abstract: M54HCT137 M54HCT137F1R M74HCT137 M74HCT137B1R M74HCT137C1R M74HCT137M1R
Contextual Info: M54HCT137 M74HCT137 3 TO 8 LINE DECODER/LATCH INVERTING . . . . . . . HIGH SPEED tPD = 17 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY

74HCT137

Abstract: M74HCT137 M74HCT137B1R M74HCT137M1R M74HCT137RM13TR M74HCT137TTR PO13H
Contextual Info: M74HCT137 3 TO 8 LINE DECODER/LATCH INVERTING • ■ ■ ■ ■ ■ HIGH SPEED: tPD =17ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

M74HCT139

Abstract: M74HCT139B1R M74HCT139M1R M74HCT139RM13TR M74HCT139TTR PO13H TSSOP16 M74HCT13
Contextual Info: M74HCT139 DUAL 2 TO 4 DECODER/DEMULTIPLEXER • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 17ns TYP. at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE:

M74HCT138

Abstract: M74HCT138B1R M74HCT138M1R M74HCT138RM13TR M74HCT138TTR PO13H TSSOP16
Contextual Info: M74HCT138 3 TO 8 LINE DECODER INVERTING • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 16ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

74HC138

Abstract: M54HCT138 M54HCT138F1R M74HCT138 M74HCT138B1R M74HCT138C1R M74HCT138M1R connection diagram of ic 74ls138
Contextual Info: M54HCT138 M74HCT138 3 TO 8 LINE DECODER INVERTING . . . . . . . HIGH SPEED tPD = 16 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE

Contextual Info: SbE D • 7 ^ 2 3 7 □GB'iflâS SÛT « S fiT H SGS-THOMSON M54HCT137 [LiO TM Ê i_ M74HCT137 S G S-THOMSON T - é 7 - 2 /" S S 3 TO 8 LINE DECODER/LATCH ■ LOW POWER DISSIPATION ICC = 4 M MAX. at TA = 25°C ■ HIGH NOISE IMMUNITY V|MIH = VNIL = 28<>/o VCC (MIN.)

M74HCT13

Contextual Info: Æ T SCS-TNOM SON *7# RÂlOMtlILIlÊ'irmDgi M54HCT138 M74HCT138 3 TO 8 LINE DECODER • LOW POWER DISSIPATION IC C = 4 f*A MAX. at TA = 25°C ■ HIGH NOISE IMMUNITY V n ih = VNIL= 28% VCc (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ SYMMETRICAL OUTPUT IMPEDANCE

74LS137

Abstract: M54HCT137 M74HCT137
Contextual Info: M54HCT137 M74HCT137 HS-CMOS 46 7 é> INTEGRATED CIRCUITS ^ -PRODUCT PREVIEW 3 TO 8 LINE DECODER/LATCH DESCRIPTION T h e M 5 4 /7 4 H C T 137 is a hig h sp e e d C M O S 3 T O 8 LIN E D E C O D E R /LA T C H fab ricate d in silicon gate C 2M O S te c h n o lo g y .

g1g7

Abstract: M74HCT13
Contextual Info: r z 7 SCS-THOM SON Ä 7 # [»imeglTIFMOOS M54HCT137 M74HCT137 3 TO 8 LINE DECODER/LATCH INVERTING • HIGH SPEED tPD = 17 ns (TYP.) AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 4 pA (MAX.) AT T a = 25 °C ■ COMPATIBLE WITH TTL OUTPUTS Vih = 2V (MIN.) V il = 0.8V (MAX)

Contextual Info: M IT S U B IS H I <DIGITAL ASSP> M 74H C T 138-1P /F P l-O F -8 D E C O D E R /D E M U L T IP L E X E R W IT H L S T T L -C O M P A T IB L E IN P U T S DESCRIPTION The M74HCT138-1 is a sem iconductor integ rate d c irc u it PIN CONFIGURATION TOP VIEW consisting of a 3 -b it bina ry-to 8-lin e d e c o d e r/d e m u ltip le x e r

74HCT137

Abstract: M74HCT137 M74HCT137B1R M74HCT137M1R M74HCT137RM13TR M74HCT137TTR PO13H M74HCT137B1
Contextual Info: M74HCT137 3 TO 8 LINE DECODER/LATCH INVERTING • ■ ■ ■ ■ ■ HIGH SPEED: tPD =17ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

74HCTI38

Contextual Info: sb E ]> • □ o a 'iô 'ib 3 b 4 m s g t h Æ 7 S G S -T H O M S O N ^ 7 # , RitlOWdILiKgraRilOÊS S G M54HCT138 M74HCT138 T - 6 7 - Z i S S * S-THOMSON 3 TO 8 LINE DECODER ■ LOW POWER DISSIPATION Ice = 4 MAX. at Ta = 25°C ■ HIGH NOISE IMMUNITY Vnih = V n il= 28% Vcc (MIN.)

74HCT137

Abstract: M74HCT137 M74HCT137B1R M74HCT137M1R M74HCT137RM13TR M74HCT137TTR PO13H
Contextual Info: M74HCT137 3 TO 8 LINE DECODER/LATCH INVERTING • ■ ■ ■ ■ ■ HIGH SPEED: tPD =17ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

M74HCT00

Contextual Info: M74HCT132 QUAD 2-INPUT SCHMITT NAND GATE PRELIM IN ARY DATA . HIGH SPEED: tpD = 20 ns TYP. at Vcc = 4.5V . LOW POWER DISSIPATION: lcc = 1 nA(M AX.)atTA =25°C . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS . HIGH NOISE IMMUNITY VH (TYP.) = 0.71 V AT Vcc = 4.5V

Contextual Info: M74HCT138 3 TO 8 LINE DECODER INVERTING • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 16ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

pin diagram of ic 74ls138

Abstract: connection diagram of ic 74ls138 t138 FUNCTIONAL APPLICATION OF 74LS138 74HC138 M74HCT13
Contextual Info: M54HCT138 M74HCT138 SGS-THOMSON 3 TO 8 LINE DECODER INVERTING . HIGH SPEED tPD = 16 ns (TYP.) at Vcc = 5 V . LOW POWER DISSIPATION Ice = 4 (iA AT TA = 25 "C . OUTPUT DRIVE CAPABILITY 10LSTTL LOADS • BALANCED PROPAGATION DELAYS tpLH = tPHL B1R (Plastic Package)

M74HCT00

Contextual Info: M74HCT132 QUAD 2-INPUT SCHMITT NAND GATE • ■ ■ ■ ■ ■ HIGH SPEED: tPD = 19ns TYP. at VCC = 4.5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY : VH = 0.7V (TYP) at Vcc = 4.5V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL