M74AS1832P Search Results
M74AS1832P Datasheets Context Search
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Contextual Info: DESCRIPTION The M 7 4A S 1 832 P is a sem iconductor integrated circuit PIN CONFIGURATION TOP VIEW consisting of six 2-input positive-logic O R buffer gates, IN P U T 5 B —•[ 7 OUTPUT 6 Y — |T usable as n e g ative-log ic A N D buffer gates. f 6a^GE |
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M74AS1832P |