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National Semiconductor Corporation 74LVQ00SCX NAND Gate 4-Element 2-IN 14-Pin SOIC N T/R
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Bristol Electronics	74LVQ00SCX		2,496			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Fairchild Semiconductor Corporation 74LVQ00SJ Logic IC NAND Gate 4 Element 2.5V, 3.3V 14-SOIC Tube
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Rochester Electronics	74LVQ00SJ		4,700		1	1 - 10 - 100 $1.08 1000 $0.90 10000 $0.80	Buy Now
STMicroelectronics 74LVQ00TTR NAND Gate, LVQ Series, 4-Func, 2-Input, CMOS, PDSO14
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Vyrian	74LVQ00TTR		13,095			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Analog Devices (Maxim Integrated) MAX2172ETL-V-Q00
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Vyrian	MAX2172ETL-V-Q00		9,601			1 - 10 - 100 - 1000 - 10000 -	Get Quote
STMicroelectronics 74LVQ00M
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Vyrian	74LVQ00M		9,436			1 - 10 - 100 - 1000 - 10000 -	Get Quote

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LVQ00 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
74LVQ00 Abstract: 74LVQ00SC 74LVQ00SJ M14A M14D Contextual Info: General Description Features The LVQ00 contains four 2-input NAND gates. n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and dynamic threshold performance n Guaranteed pin-to-pin skew AC performance n Guaranteed incident wave switching into 75Ω	Original	lvq00 74lvq00sc 14-lead 74lvq00sj +5e80-530 ds011341 74lvq00 m14a m14d	PDF
74LVQ00 Abstract: 74LVQ00MTR 74LVQ00TTR TSSOP14 Contextual Info: lvq00.fm Page 1 Thursday, July 29, 2004 2:28 PM LVQ00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C	Original	lvq00 74lvq00 74lvq00mtr 74lvq00ttr +1tssop14	PDF
74LVQ00 Abstract: 74LVQ00SC 74LVQ00SCX 74LVQ00SJ 74LVQ00SJX M14A M14D Contextual Info: LVQ00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVQ00 contains four 2-input NAND gates Y Y Y Y Y Ideal for low power low noise 3 3V applications Guaranteed simultaneous switching noise level and dynamic threshold performance Guaranteed pin-to-pin skew AC performance	Original	74lvq00 lvq00 mil-std-883 c1996 +674lvq00sc 74lvq00scx 74lvq00sj 74lvq00sjx m14a m14d	PDF
74LVQ00 Abstract: 74LVQ00MTR 74LVQ00TTR TSSOP14 Contextual Info: lvq00.fm Page 1 Thursday, July 29, 2004 2:28 PM LVQ00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C	Original	lvq00 74lvq00 74lvq00mtr 74lvq00ttr +1tssop14	PDF
74LVQ00 Abstract: 74LVQ00SC 74LVQ00SJ M14A M14D Contextual Info: Revised April 2001 LVQ00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVQ00 contains four 2-input NAND gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance	Original	74lvq00 lvq00 74lvq00sc 14-lead +4ms-012 74lvq00sj m14a m14d	PDF
74LVQ00 Abstract: 74LVQ00M 74LVQ00T TSSOP14 Contextual Info: LVQ00  QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5 ns TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING	Original	74lvq00 lvq00 74lvq00m 74lvq00t +1tssop14	PDF
74LVQ00 Abstract: 74LVQ00M 74LVQ00T TSSOP14 Contextual Info: LVQ00 QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5 ns TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUT LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING	Original	74lvq00 lvq00 74lvq00m 74lvq00t +1tssop14	PDF
Contextual Info: Æ T S G S -T H O M S O N D lsi S IILICTIs! iD©S LVQ00 QUAD 2-INPUT NAND GATE . HIGH SPEED: tPD = 5.5 ns (TYP.) at V c c = 3.3V . COMPATIBLE WITH TTL OUTPUT . LOW POWER DISSIPATION: Ice = 2 \|xA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at V c c = 3.3V	OCR Scan	74lvq00 lvq00 p013g tss0p14	PDF
LH 036 Abstract: 74LVQ00 Contextual Info: S G S -TH O M S O N G l LVQ00 IU QUAD 2-INPUT NAND GATE . HIGH SPEED: tpD = 5.5 ns TYP. at Vcc = 3.3V . COMPATIBLE WITH TTL OUTPUT . LOW POWER DISSIPATION: Icc = 2 nA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V . 75i2 TRANSMISSION LINE DRIVING	OCR Scan	74lvq00 74lvq00m 74lvq00t s63-thomoh +1lh 036	PDF
KHN 10 Abstract: 74LVQ00 74LVQ00M 74LVQ00T TSSOP14 truth table NAND gate 74 Contextual Info: SGS-THOMSON LVQ00 M IM i[Li gïïlHÎ©iD(3S Q UAD 2-IN PUT NAND GATE . HIGH SPEED: tPD = 5.5 ns (TYP.) at V Cc =3.3V . COMPATIBLE WITH TTL OUTPUT . LOW POWER DISSIPATION: Icc = 2 \|xA (MAX.) at T a = 25 °C . LOW NOISE: V o lp = 0.3 V (TYP.) at V Cc = 3.3V	OCR Scan	74lvq00 lvq00 p013g tssop14 +4khn 10 74lvq00m 74lvq00t truth table nand gate 74	PDF
74LVQ00 Contextual Info: r z 7 Ä T # S G S -T H O M S O N R L E M « ! 74LVQ 00 QUAD 2-INPUT NAND GATE . HIGH SPEED: tPD = 5.5 ns TYP. at Vcc = 3.3V . COMPATIBLE WITH TTL OUTPUT . LOW POWER DISSIPATION: Icc = 2 jjA (MAX.) at Ta = 25 °C . LOW NOISE: V olp = 0 .3 V (TYP.) at VCc =3.3V	OCR Scan	74lvq 74lvq00m 74lvq00t 74lvq00	PDF
74LVQ00 Contextual Info: LVQ00 QUAD 2-INPUT NAND GATE . HIGH SPEED: tPD = 5.5 ns TYP. at Vcc = 3.3V • COMPATIBLE WITH TTL OUTPUTS . LOW POWER DISSIPATION: Ice = 2 nA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0 .3 V (TYP.) at V c c = 3 .3 V ■ 75Q TRANSMISSION LINE DRIVING	OCR Scan	74lvq00 74lvq00m 74lvq00t lvq00	PDF
Contextual Info: LVQOO £3 National mm Semiconductor 54LVQ/LVQ00 Low Voltage Quad 2-Input NAND Gate General Description Features The ’LVQOO contains four 2-inpul NAND gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and	OCR Scan	54lvq/74lvq00 tl/f/11341-1	PDF
74LVQ00 Contextual Info: LVQ00 QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5 ns TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUT LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING	Original	74lvq00 74lvq00m 74lvq00t	PDF