LVC821 Search Results

LVC821A

Abstract: IDT74LVC821A
Contextual Info: LVC821A 3.3V CMOS 10-BIT BUS INTERFACE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O LVC821A DESCRIPTION: FEATURES: The LVC821A 10-bit bus-interface flip-flop is built using advanced dual

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

lvc821

Contextual Info: 3.3V CMOS 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 - LVC821A ADVANCE INFORMATION ance loads. They are particularly suitable for implementing wider buffer

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

74LVC05

Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Contextual Info: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

SN74LVC821A

Abstract: SN74LVC821ADBR SN74LVC821ADW SN74LVC821ADWR SN74LVC821ANSR
Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS SCAS304I – MARCH 1993 – REVISED AUGUST 2002 D D D D D D D D D DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 7.3 ns at 3.3 V

LVC821A

Abstract: IDT74LVC821A
Contextual Info: LVC821A 3.3V CMOS 10-BIT BUS-INTERFACE FLIP-FLOP EXTENDED COMMERCIAL TEMPERATURE RANGE LVC821A ADVANCE INFORMATION 3.3V CMOS 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: ance loads. They are particularly suitable for implementing wider buffer

SN74LVC821A

Abstract: SN74LVC821ADBR SN74LVC821ADW SN74LVC821ADWR SN74LVC821ANSR SN74LVC821APW LVC821
Contextual Info: LVC821A 10ĆBIT BUSĆINTERFACE FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCAS304J − MARCH 1993 − REVISED AUGUST 2003 D D D D D D D D D DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 7.3 ns at 3.3 V

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

LVC821A

Abstract: IDT74LVC821A
Contextual Info: LVC821A 3.3V CMOS 10-BIT BUS-INTERFACE FLIP-FLOP EXTENDED COMMERCIAL TEMPERATURE RANGE LVC821A 3.3V CMOS 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: ance loads. They are particularly suitable for implementing wider buffer

Contextual Info: 3.3V CMOS 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O FEATURES: - capacitive or relatively low-impedance loads. They are par­ ticularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working regis­

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS SCAS304I – MARCH 1993 – REVISED AUGUST 2002 D D D D D D D D D DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 7.3 ns at 3.3 V

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS SCAS304J – MARCH 1993 – REVISED AUGUST 2003 D D D D D D D D D DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 7.3 ns at 3.3 V

Contextual Info: 3.3V CMOS 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O FEATURES: - capacitive or relatively low-impedance loads. They are par­ ticularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working regis­

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

SN74LVC821A

Abstract: SN74LVC821ADBR SN74LVC821ADW SN74LVC821ADWR SN74LVC821ANSR LC821A
Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

SN74LVC821A

Abstract: SN74LVC821ADBR SN74LVC821ADW SN74LVC821ADWR SN74LVC821ANSR LC821A
Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

LC821A

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

LC821A

Abstract: SN74LVC821A SN74LVC821ADBR SN74LVC821ADW SN74LVC821ADWR SN74LVC821ANSR
Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS SCAS304H – MARCH 1993 – REVISED MARCH 2002 D D D D D D Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C

Contextual Info: LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V