LVC1G125 Search Results

Contextual Info: LVC1G125A 3.3V CMOS ADVANCE INFORMATION SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - The LVC1G125A single bus buffer gate is built using ad­ vanced dual metal CMOS technology. The LVC1G125A is de­ signed for 1,65V to 3.6V V cc operation and features indepen­

Contextual Info: LVC1G125A 3.3V CMOS ADVANCE INFORMATION SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - The LVC1G125A single bus buffer gate is built using ad­ vanced dual metal CMOS technology. The LVC1G125A is de­ signed for 1,65V to 3.6V V cc operation and features indepen­

IDT74ALVC1G04

Abstract: IDT74LVC1G125A IDT74LVC1G79A LVC1G125A 1g125
Contextual Info: LVC1G125A 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT AND 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: – – – – – – – – – – – LVC1G125A

LVC1G125A

Abstract: IDT74LVC1G125A IDT74ALVC1G04 IDT74LVC1G79A PicoGate 1G125A
Contextual Info: LVC1G125A 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT AND 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: – – – – – – – – – – – LVC1G125A

Contextual Info: 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT AND 5 VOLT TOLERANT I/O D E S C R IP TIO N : FE A T U R E S : - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 0.65mm pitch PSOP package

LVC1G125

Contextual Info: LVC1G125 SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUT SCES223N − APRIL 1999 − REVISED JUNE 2005 D Available in the Texas Instruments D Ioff Supports Partial-Power-Down Mode NanoStar and NanoFree Packages D D D D D Operation D Latch-Up Performance Exceeds 100 mA

Contextual Info: Product Folder Sample & Buy Technical Documents Support & Community Tools & Software LVC1G125 SCES223S – APRIL 1999 – REVISED APRIL 2014 LVC1G125 Single Bus Buffer Gate With 3-State Output 1 Features • 1 • • • • • • • • • 3 Description

Contextual Info: Product Folder Sample & Buy Technical Documents Support & Community Tools & Software LVC1G125 SCES223S – APRIL 1999 – REVISED APRIL 2014 LVC1G125 Single Bus Buffer Gate With 3-State Output 1 Features • 1 • • • • • • • • • 3 Description

Contextual Info: 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT AND 5 VOLT TOLERANT I/O J m ïï., D E S C R IP TIO N : FE A T U R E S : - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 0.65mm pitch PSOP package

IDT74ALVC1G04

Abstract: IDT74LVC1G125A IDT74LVC1G79A LVC1G125A
Contextual Info: LVC1G125A 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT AND 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: – – – – – – – – – – – LVC1G125A

Contextual Info: LVC1G125 SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUT SCES223N − APRIL 1999 − REVISED JUNE 2005 D Available in the Texas Instruments D Ioff Supports Partial-Power-Down Mode NanoStar and NanoFree Packages D D D D D Operation D Latch-Up Performance Exceeds 100 mA

74LVC1G18

Abstract: 5pin L6 inverter cross reference guide 74LVC1G19 SN74AUP1T08 SN74AUP1T02 TC7WZU04 LVC2T45 TC7SZ044 0.3mm pitch csp package
Contextual Info: Little Logic Guide Gate Functions Signal-Switch Functions Configurable Functions Translation Functions > Availability > Quality > Service > Support > Pricing www.ti.com/littlelogic 2011 Little Logic Guide ➔ Table of Contents Overview 3 Little Logic Products by Performance

NXP 74LVC1G

Abstract: SN74LVC2G TC7SZU04 "cross-reference" 74AHC1G14 SOT-23 SCYT129E SN74AUP AUP1G00 74AUP3G17 TC7SG125 nxp Cross-reference
Contextual Info: Little Logic Guide Gates Configurables Signal Switches Translators www.ti.com/littlelogic 2012 Little Logic Guide ➔ Table of Contents Overview 3 Little Logic Products by Performance 4 Logic Migration to 1.8-V Future . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4