LVC16652A Search Results
LVC16652A Datasheets Context Search
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IDT74LVC16652A
Abstract: LVC16652A
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idt74lvc16652a16-bitlvc16652a | |
74LVC05
Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
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32-bitcompatibilit-785074lvc057400 datasheet 2-input nand gate+8 | |
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Contextual Info: 3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER, 5 VOLT TOLERANT I/O BE LVC16652A D E S C R IP TIO N : FE A T U R E S : - Typical tsK o (Output Skew) < 250ps - ESD > 2000V per MIL-STD-883, Method 3015; - 0.635mm pitch S SO P , 0.50mm pitch T S S O P > 200V using machine model (C = 200pF, R = 0) |
OCR Scan |
16-bitidt74lvc16652a250psmil-std-883+5 | |
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Contextual Info: 3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER, 5 VOLT TOLERANT I/O LVC16652A low power device is organized as two independent 8-bit bus transceivers with 3-state D-type registers. For example, the OEAB and OEBA signals control the transceiver functions. |
OCR Scan |
16-bitidt74lvc16652a250psmil-std-883+4 | |
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Contextual Info: LVC16652A 3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER, 5 VOLT TOLERANT I/O FEATURES: - low power device is organized as two independent 8-bit bus transceivers with 3-state D-type registers. For example, the OEAB and OEBA signals control the transceiver functions. |
OCR Scan |
idt74lvc16652a16-bit | |
IDT74LVC16652A
Abstract: LVC16652A
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Original |
idt74lvc16652a16-bit250psmil-std-883+4 |