LVC00A Search Results

Contextual Info: LVC00AĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCAS729 − NOVEMBER 2003 D Controlled Baseline D D D D D D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −40°C to 125°C Enhanced Diminishing Manufacturing

Contextual Info: 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 1,27mm pitch SOIC, 0.65mm pitch SSOP and 0.65mm pitch TSSOP packages

Contextual Info: LVC00A-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCAS703A – SEPTEMBER 2003 – REVISED JUNE 2005 FEATURES • • • • • • • • • 1 D OR PW PACKAGE (TOP VIEW) Qualification in Accordance With AEC-Q100 (1) Qualified for Automotive Applications

LVC00

Abstract: A115-A C101 SN54LVC00A SN74LVC00A
Contextual Info: LVC00A, LVC00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES www.ti.com SCAS279P – JANUARY 1993 – REVISED JULY 2005 FEATURES 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 1 14 2 13 4B 3 4 12 4A 11 4Y 10 3B 5 6 9 3A 7 8 LVC00A . . . FK PACKAGE

Contextual Info: LVC00A, LVC00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES www.ti.com SCAS279P – JANUARY 1993 – REVISED JULY 2005 FEATURES 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 1 14 2 13 4B 3 4 12 4A 11 4Y 10 3B 5 6 9 3A 7 8 LVC00A . . . FK PACKAGE

Contextual Info: LVC00A-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCAS703A – SEPTEMBER 2003 – REVISED JUNE 2005 FEATURES • • • • • • • • • 1 D OR PW PACKAGE (TOP VIEW) Qualification in Accordance With AEC-Q100 (1) Qualified for Automotive Applications

Contextual Info: LVC00AĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SCAS703 − SEPTEMBER 2003 D Qualification in Accordance With D D D D D D D D Typical VOHV Output VOH Undershoot AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

lc00a

Contextual Info: LVC00A, LVC00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES www.ti.com SCAS279P – JANUARY 1993 – REVISED JULY 2005 FEATURES 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 1 14 2 13 4B 3 4 12 4A 11 4Y 10 3B 5 6 9 3A 7 8 LVC00A . . . FK PACKAGE

lc00a

Contextual Info: LVC00A, LVC00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES www.ti.com SCAS279P – JANUARY 1993 – REVISED JULY 2005 FEATURES 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 1 14 2 13 4B 3 4 12 4A 11 4Y 10 3B 5 6 9 3A 7 8 LVC00A . . . FK PACKAGE

LVC125

Abstract: lvc14 lvc04 LVC74A lvc138a LVC00 lvc04a LVC14A lvc08 LVC08A
Contextual Info: TEXAS INSTRUMENTS Informational Notification of Datasheet Changes to Selected LVC Devices September 25, 1996 Abstract Texas Instruments is reducing the maximum limit on various timing specifications on a selected group of LVC devices. This reduction is within the current specification and no changes were made to the die

Contextual Info: LVC00A-EP QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCAS729A – NOVEMBER 2003 – REVISED JUNE 2005 • FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C

Contextual Info: LVC00A, LVC00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES www.ti.com SCAS279P – JANUARY 1993 – REVISED JULY 2005 FEATURES 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 1 14 2 13 4B 3 4 12 4A 11 4Y 10 3B 5 6 9 3A 7 8 LVC00A . . . FK PACKAGE

SN74 schmitt trigger

Abstract: SDYU001 SN54LV00A SN54LV02A SN54LV04A SN54LV05A SN54LV08A SN54LV14A SN54LV32A SN54LV74A
Contextual Info: LVC and LV LowĆVoltage CMOS Logic Data Book 1998 Logic Products General Information LVC Gates and MSI LVC Octals LVC Widebus LVC 3.3-V to 5-V Translators and Cable Drivers LV Gates and MSI LV Octals Application Reports Mechanical Data LVC and LV Low-Voltage CMOS Logic

Contextual Info: LVC00A-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCAS703B – SEPTEMBER 2003 – REVISED FEBRUARY 2008 FEATURES 1 • • • • • • • D OR PW PACKAGE TOP VIEW Qualified for Automotive Applications ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V

Contextual Info: LVC00A, LVC00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES www.ti.com SCAS279P – JANUARY 1993 – REVISED JULY 2005 FEATURES 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 1 14 2 13 4B 3 4 12 4A 11 4Y 10 3B 5 6 9 3A 7 8 LVC00A . . . FK PACKAGE

Contextual Info: LVC00A-EP QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCAS729B – NOVEMBER 2003 – REVISED MARCH 2007 • FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C

Contextual Info: LVC00A-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCAS703A – SEPTEMBER 2003 – REVISED JUNE 2005 FEATURES • • • • • • • • • 1 D OR PW PACKAGE (TOP VIEW) Qualification in Accordance With AEC-Q100 (1) Qualified for Automotive Applications

Contextual Info: LVC00A-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCAS703B – SEPTEMBER 2003 – REVISED FEBRUARY 2008 FEATURES 1 • • • • • • • D OR PW PACKAGE TOP VIEW Qualified for Automotive Applications ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V

Contextual Info: LVC00A, LVC00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES www.ti.com SCAS279P – JANUARY 1993 – REVISED JULY 2005 FEATURES 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 1 14 2 13 4B 3 4 12 4A 11 4Y 10 3B 5 6 9 3A 7 8 LVC00A . . . FK PACKAGE

Contextual Info: LVC00A-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCAS703B – SEPTEMBER 2003 – REVISED FEBRUARY 2008 FEATURES 1 • • • • • • • D OR PW PACKAGE TOP VIEW Qualified for Automotive Applications ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V

Contextual Info: LVC00A, LVC00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCAS279M– JANUARY 1993 – REVISED JULY 2003 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 13 4B 2 3 12 4A 4 11 4Y 5 10 3B 9 3A 6 7 8 LVC00A . . . FK PACKAGE

Contextual Info: LVC00A, LVC00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCAS279N− JANUARY 1993 − REVISED SEPTEMBER 2003 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 2 13 4B 3 12 4A 4 11 4Y 10 3B 9 3A 5 6 7 8 LVC00A . . . FK PACKAGE

A115-A

Abstract: C101 SN54LVC00A SN74LVC00A lc00a
Contextual Info: LVC00A, LVC00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES www.ti.com SCAS279P – JANUARY 1993 – REVISED JULY 2005 FEATURES 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 1 14 2 13 4B 3 4 12 4A 11 4Y 10 3B 5 6 9 3A 7 8 LVC00A . . . FK PACKAGE

LVC00A

Contextual Info: 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-NAND GATE, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 1.27mm pitch SOIC, 0.65mm pitch SSOP and 0.65mm pitch TSSOP packages