LOGIC OR GATE 3 INPUTS Search Results

cd74HC32

Abstract: cd74hct32
Contextual Info: P *3 3 S CD54HCT32, CD74HC32, CD74HCT32 High Speed CMOS Logic Quad 2-Input OR Gate September 1997 Features Description • Typical Propagation Delay: 7ns at Vcc = 5V, C L = 15pF, Ta = 25°C The Harris CD74HC32, CD74HCT32 contain four 2-input OR gates in one package. Logic gates utilize silicon gate CMOS

Contextual Info: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4071BP/BF/BFNJC4072BP/BF TC4075BP/BF TC4071B QUAD 2 INPUT OR GATE TC4072B DUAL 4 INPUT OR GATE TC4075B TRIPLE 3 INPUT OR GATE TC4071B, TC4075BP / BF and TC4072BP / BF are positive logic OR gates w ith tw o inputs, three inputs and fo ur inputs

Contextual Info: S CD74HC4075, CD74HCT4075 Semiconductor y High Speed CMOS Logic Triple 3-Input OR Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC4075, CD74HCT4075 logic gates utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of

C4075

Abstract: 74HCT 74LS CD54HC4075H CD74HC4075 CD74HC4075E CD74HC4075M CD74HCT4075
Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD74HC4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210 High Speed CMOS Logic Triple 3-Input OR Gate August 1997 Features Description • Buffered Inputs

TC4072B

Abstract: TC4075BP TC4072BP TC4071B
Contextual Info: TC4071BP/BF/ BFN, TC4072BP/BF C2MOS DIGITAL INTEGRATED CIRCUIT T P ^ n 7 K B D / B C SILICON MONOLITHIC I IrrU / JD I7 Dr TC4071B QUAD 2 INPUT OR GATE TC4072B DUAL 4 INPUT OR GATE TC4075B TRIPLE 3 INPUT OR GATE TC4071B, TC4075BP/ BF and TC4072BP / BF are positive logic

DIN159

Abstract: PLS159AN OEA159 PLS159 PLS159A PLS159AA CK159
Contextual Info: Philips Semiconductors Programmable Logic Devices Product specification Programmable logic sequencer 16 x 45 × 12 DESCRIPTION PLS159A FEATURES The PLS159A is a 3-State output, registered logic element combining AND/OR gate arrays with clocked J-K flip-flops. These J-K

74AUP1G0832

Abstract: 74AUP1G0832GF 74AUP1G0832GM 74AUP1G0832GW
Contextual Info: 74AUP1G0832 Low-power 3-input AND-OR gate Rev. 3 — 5 October 2010 Product data sheet 1. General description The 74AUP1G0832 provides the Boolean function: Y = A x B + C. The user can choose the logic functions OR, AND and AND-OR. All inputs can be connected to VCC or GND.

Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210F High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised August 2003

Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006

74AUP1G3208

Abstract: 74AUP1G3208GF 74AUP1G3208GM 74AUP1G3208GW
Contextual Info: 74AUP1G3208 Low-power 3-input OR-AND gate Rev. 3 — 11 October 2010 Product data sheet 1. General description The 74AUP1G3208 provides the Boolean function: Y = A + B x C. The user can choose the logic functions OR, AND and OR-AND. All inputs can be connected to VCC or GND.

Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006

SCHS210G

Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006

cd74hc4075

Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006

C4075

Abstract: CD54HC4075 CD54HC4075F3A CD54HCT4075 CD74HC4075 CD74HCT4075 HC4075
Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210F High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised August 2003

ic 7451 pin configuration

Abstract: 74 LS 00 Logic Gates
Contextual Info: 7451, LS51, S51 Signetics Gates '51, 'S51 Dual 2-Wide 2-Input AND-OR-lnvert Gate LS51 Dual 2-Wide 3-Input, 2-Wide 2-Input AND-OR-lnvert Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7451 11ns 5.7mA 74LS51

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D N14A
Contextual Info: 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate 3-3 AND-OR-INVERT function. General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a Ordering Code: Commercial Package Number

C4075

Abstract: CD54HC4075 CD54HC4075F3A CD54HCT4075 CD74HC4075 CD74HCT4075 HC4075
Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006

HC4075

Abstract: C4075 CD54HC4075 CD54HC4075F3A CD54HCT4075 CD74HC4075 CD74HCT4075
Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210D High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised May 2003

C4075

Abstract: CD54HC4075 CD54HC4075F3A CD54HCT4075 CD74HC4075 CD74HCT4075 HC4075
Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210G High-Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised June 2006

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D MS-001 N14A
Contextual Info: Revised September 2000 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code:

MC10117

Abstract: MC10117FN MC10117L MC10117P
Contextual Info: MC10117 Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate T h e M C 1 0 11 7 i s a d u a l 2 – w i d e 2 – 3 – i n p u t OR–AND/OR–AND–Invert gate. This general purpose logic element is designed for use in data control, such as digital multiplexing or data

MC10117

Abstract: DL122
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate MC10117 The MC10117 is a dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate. This general purpose logic element is designed for use in data control, such as digital multiplexing or data distribution. Pin 9 is common to both gates.

C4075

Abstract: CD54HC4075F3A CD54HCT4075F3A CD74HC4075E HC4075
Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54/74HC4075, CD54/74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210C High Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised October 2002 Features

Contextual Info: [ /Title CD74H C4075, CD74H CT4075 /Subject (High Speed CMOS Logic Triple 3Input CD54/74HC4075, CD54/74HCT4075 Data sheet acquired from Harris Semiconductor SCHS210C High Speed CMOS Logic Triple 3-Input OR Gate August 1997 - Revised October 2002 Features