LOGIC GATES CIRCUIT DIAGRAM Search Results

74AS1804

Contextual Info: MITSUBISHI ASTTLs -*00°° M 74AS1804P HEX 2-INPUT NAND DRIVER DESCRIPTION The M74AS1804P is a semiconductor integrated circuit consisting of six 2-input positive-logic NAND buffer gates, usable as negative-logic NOR buffer gates. PIN CONFIGURATION TOP VIEW

M74AS02P

Contextual Info: MITSUBISHI ASTTLs M74AS02P ŸŸ& 0 QUADRUPLE 2-INPUT POSITIVE NOR GATE DESCRIPTION PIN CONFIGURATION TOP VIEW The M74AS02P is a semiconductor integrated circuit consisting of four 2-input positive-logic NOR gates, us­ able as negative-logic NAND gates.

Contextual Info: MITSUBISHI ASTTLs pS?< M74AS20P DUAL 4 -INPUT POSITIVE NAND G ATE DESCRIPTION PIN CONFIGURATION TOP VIEW The M74AS20P is a semiconductor integrated circuit consisting of two 4-input positive-logic NAND gates, us­ able as negative-logic NOR gates. FEATURES

74AS1000

Contextual Info: MITSUBISHI A STTLs M 74AS1000AP QUADRUPLE 2-INPUT POSITIVE NAND DRIVER DESCRIPTION PIN CONFIGURATION TOP VIEW The M74AS1000AP is a semiconductor integrated circuit consisting of four 2-input positive-logic NAND buffer gates, usable as negative-logic NOR buffer gates.

Contextual Info: MITSUBISHI ASTTLs M74AS08P QUADRUPLE 2-INPUT POSITIVE AND GATE DESCRIPTION PIN CONFIGURATION TOP VIEW The M74AS08P is a semiconductor integrated circuit consisting of four 2-input positive-logic AND gates, us­ able as negative-logic OR gates. FEATURES • High speed

spckt_10003.0

Contextual Info: Category: Special Circuits CIRCUIT IDEAS FOR DESIGNERS Schematic no. SPCKT_10003.0 0.2V Supply Voltage Nanopower Two-Input NOR and NAND gates Description Simple logic gates such as NOR and NAND gates can be readily implemented using EPAD MOSFETs to operate

M74LS00P

Abstract: 20-PIN M74LS00
Contextual Info: M IT S U B IS H I LSTTLs M74LS00P QUADRUPLE 2-IN P U T POSITIVE NAND GATES DESCRIPTION The M 74LS 00P is semiconductor integrated circuit contain­ ing fo u r dual-input positive-logic N A N D gates, usable as negative-logic N O R gates. FEATURES • High breakdown input voltage V | S 15 V

TC4081BP

Abstract: DIP14-P-300-2 TC4081B TC4081BF TC4081BFN
Contextual Info: TC4081BP/BF/BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4081BP,TC4081BF,TC4081BFN TC4081B Quad 2-Input AND Gate TC4081B is positive logic AND gates with two inputs respectively. Since all the outputs of these gates are equipped with the

Dual 4-input NAND Schmitt Trigger

Abstract: M74LS13P M74ls14p 20-PIN
Contextual Info: MITSUBISHI LSTTLs M74LS13P DUAL 4 -IN P U T NAND S C H M ITT TRIGGER DESCRIPTION The M 74LS 13P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing tw o 4-inp ut positive-logic N A N D gates having a Schm itt trigger function and negative-logic NOR gates.

TC4081BP

Contextual Info: TC4081BP/BF/BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4081BP,TC4081BF,TC4081BFN TC4081B Quad 2-Input AND Gate TC4081B is positive logic AND gates with two inputs respectively. Since all the outputs of these gates are equipped with the

TC4081BP

Abstract: DIP14-P-300-2 TC4081B TC4081BF TC4081BFN
Contextual Info: TC4081BP/BF/BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4081BP,TC4081BF,TC4081BFN TC4081B Quad 2-Input AND Gate TC4081B is positive logic AND gates with two inputs respectively. Since all the outputs of these gates are equipped with the

Contextual Info: TC4071BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4071BFN TC4071B Quad 2-Input OR Gate TC4071B is positive logic OR gates with two inputs respectively. As all the outputs of gates are equipped with the buffer circuits of inverters, the input/output propagation

DM7400

Abstract: DM7400M DM7400N M14A MS-001 N14A
Contextual Info: Revised July 2001 DM7400 Quad 2-Input NAND Gates General Description This device contains four independent gates each of which performs the logic NAND function. Ordering Code: Order Number Package Number DM7400M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, 0.150" Narrow

Contextual Info: TC4081BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4081BFN TC4081B Quad 2-Input AND Gate TC4081B is positive logic AND gates with two inputs respectively. Since all the outputs of these gates are equipped with the buffer circuits of inverters, the input/output propagation

DM7404

Abstract: DM7404M DM7404N M14A MS-001 N14A
Contextual Info: Revised February 2000 DM7404 Hex Inverting Gates General Description This device contains six independent gates each of which performs the logic INVERT function. Ordering Code: Order Number Package Number Package Description DM7404M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, 0.150 Narrow

m14a

Abstract: DM7404 DM7404M DM7404N MS-001 N14A
Contextual Info: Revised July 2001 DM7404 Hex Inverting Gates General Description This device contains six independent gates each of which performs the logic INVERT function. Ordering Code: Order Number Package Number Package Description DM7404M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, 0.150" Narrow

Contextual Info: TC4071BP/BF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4071BP, TC4071BF TC4071B Quad 2-Input OR Gate TC4071B is positive logic OR gates with two inputs respectively. As all the outputs of gates are equipped with the buffer circuits of inverters, the input/output propagation

Contextual Info: TC4071BP/BF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4071BP,TC4071BF TC4071B Quad 2-Input OR Gate TC4071B is positive logic OR gates with two inputs respectively. As all the outputs of gates are equipped with the buffer circuits of inverters, the input/output propagation

DM74S04

Abstract: DM74S04M DM74S04N M14A MS-001 N14A
Contextual Info: Revised April 2000 DM74S04 Hex Inverting Gates General Description This device contains six independent gates each of which performs the logic INVERT function. Ordering Code: Order Number Package Number Package Description DM74S04M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow

fet_11116.0

Contextual Info: Category: FET CIRCUIT IDEAS FOR DESIGNERS Schematic no. fet_11116.0 Ultra low voltage Nanopower Two-Input NOR and NAND gates Description Simple logic gates such as NOR and NAND gates can be readily implemented using EPAD MOSFETs to operate at ultra low voltage and low current levels. At V+ supply voltages below 400 mV, EPAD MOSFETs are actually

ALTERA EP1810LC-45

Abstract: EP1810LC-45 EP1810LC-35 EP1810JC-45 EP1810jC-35 EP1810JC EP1810LC45
Contextual Info: EP1810 HIGH-PERFORMANCE 48-MACROCELL ERASABLE PROGRAMMABLE LOGIC DEVICE EPLD D3232. FEBRUARY 1989-R E V IS E D AUGUST 1989 • Erasable, User-Configurable LSI Circuit Capable of Implementing 2100 Equivalent Gates of Conventional and Custom Logic CHIP-CARRIER PACKAGE

DM74LS08N

Abstract: DM74LS08 dm74ls08 quad 2-input and gates DM74LS08M DM74LS08SJ M14A M14D MS-001 N14A
Contextual Info: Revised March 2000 DM74LS08 Quad 2-Input AND Gates General Description This device contains four independent gates each of which performs the logic AND function. Ordering Code: Order Number Package Number Package Description DM74LS08M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow

TC4071BP

Abstract: DIP14-P-300-2 TC4071B TC4071BF TC4071BFN
Contextual Info: TC4071BP/BF/BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4071BP,TC4071BF,TC4071BFN TC4071B Quad 2-Input OR Gate TC4071B is positive logic OR gates with two inputs respectively. As all the outputs of gates are equipped with the buffer circuits of inverters, the input/output propagation

TC4071BP

Abstract: TC4071B TC4071BF TC4071BFN DIP14-P-300-2
Contextual Info: TC4071BP/BF/BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4071BP,TC4071BF,TC4071BFN TC4071B Quad 2-Input OR Gate TC4071B is positive logic OR gates with two inputs respectively. As all the outputs of gates are equipped with the buffer circuits of inverters, the input/output propagation