LMU11250 Search Results

B1016

Abstract: LMU11250
Contextual Info: LMU112 12 x 12-bit Parallel Multiplier □ FV IC E S IN C O R P Q R A T F D FEATURES □ 25 ns W orst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Fairchild M PY112K □ Tw o's Complement or Unsigned Operands □ Three-State Outputs □ Package Styles Available:

Contextual Info: . o <13 »nil CI» LMU112 12 x 12-bit Parallel M ultip lie r T he L M U 112 is a high-speed, low p ow er 12-bit parallel m ultiplier bu ilt using ad vanced C M O S technology. The L M U 112 is pin and functionally com patible w ith T R W 's M PY112K . □ 25 ns W orst-C ase M u ltiply Tim e