LM 4280 Search Results

Contextual Info: Cree LMH2 LED Modules LMH2 Light LMH2 Light Source with Source with Flat Lens Dome Lens Product Description Features Table of Contents Cree LED modules provide lighting • Industry-leading light-source Characteristics - WhiteLight efficacy steady state of up

IC 741 OPAMP

Abstract: SAA 1251 7106CPL TDA2620 SAA1121 LM 4440 AUDIO AMPLIFIER CIRCUIT touch dimmer TC 306H TDA 2310 TDA 2060 7107CPL
Contextual Info: Lineaire IC’s Lineaire IC’s dil to 99 dil 8 to 99 dil 18 to 78 to 99 dil 20 to 99 cer dip to 78 Wij leveren een groot aantal lineaire ic's uit voorraad. Kunt u een bepaald type niet vinden, aarzel dan niet ons telefonisch te raadplegen. Veelal kunnen wij u op korte

ic lm 3525

Abstract: IC LM 3210 lm 4050 ic 4050 spice MC100E122 MC100E122FN MC100E122FNR2 MC10E122 MC10E122FN MC10E122FNR2
Contextual Info: MC10E122, MC100E122 5VĄECL 9ĆBit Buffer The MC10E/100E122 is a 9-bit buffer. The device contains nine non-inverting buffer gates. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC= 4.2 V to 5.7 V

MC100E101

Abstract: MC100E101FN MC100E101FNR2 MC10E101 MC10E101FN MC10E101FNR2
Contextual Info: MC10E101, MC100E101 5VĄECL Quad 4ĆInput OR/NOR Gate The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC= 4.2 V to 5.7 V • http://onsemi.com

transistor tl 4311

Abstract: transistor 2sc1570 TRANSISTOR BC 157 TRANSISTOR BC 158 PA 2027A 2SC1570 TRANSISTOR IFW S2003A opa 2064 TRANSISTOR "BC 157"
Contextual Info: 3EE D SANYO SE MICONDUCTOR CORP 7Ti707b OGDÖÖ3Ö 1 | r - 2003A ' 2 f - / s N P N Epitaxial P la n a r S ilic o n T ra n s is to r Low-Noise Amp Applications 43 IE The 2SC1570 is developed as very low-noise tra n s isto r and is especially suited for use in equ alizer first

ic xnor

Abstract: MC100E107 MC100E107FN MC100E107FNR2 MC10E107 MC10E107FN MC10E107FNR2
Contextual Info: MC10E107, MC100E107 5VĄECL Quint 2ĆInput XOR/XNOR Gate The MC10E/100E107 is a quint 2-input XOR/XNOR gate. The function output F is the OR of all five XOR outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used.

E112

Abstract: E212 MC100E112 MC100E112FN MC10E112 MC10E112FN MC10E112FNR2
Contextual Info: MC10E112, MC100E112 5VĄECL Quad Driver The MC10E/100E112 is a quad driver with two pairs of OR/NOR outputs from each gate, and a common, buffered enable input. Using the data inputs the device can serve as an ECL memory address fan-out driver. Using just the enable input, the device serves as a clock

ic 4050

Abstract: marking CODE D2B MC100E101 MC100E101FN MC100E101FNR2 MC10E101 MC10E101FN MC10E101FNR2
Contextual Info: MC10E101, MC100E101 5VĄECL Quad 4ĆInput OR/NOR Gate The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC= 4.2 V to 5.7 V • http://onsemi.com

MC100E107

Abstract: MC100E107FN MC100E107FNR2 MC10E107 MC10E107FN MC10E107FNR2 marking CODE D2B
Contextual Info: MC10E107, MC100E107 5VĄECL Quint 2ĆInput XOR/XNOR Gate The MC10E/100E107 is a quint 2-input XOR/XNOR gate. The function output F is the OR of all five XOR outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used.

mst 720

Abstract: MC100E122 MC100E122FN MC100E122FNR2 MC10E122 MC10E122FN MC10E122FNR2
Contextual Info: MC10E122, MC100E122 5VĄECL 9ĆBit Buffer The MC10E/100E122 is a 9-bit buffer. The device contains nine non-inverting buffer gates. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC= 4.2 V to 5.7 V

MC100E104

Abstract: MC100E104FN MC100E104FNR2 MC10E104 MC10E104FN MC10E104FNR2 ECL IC NAND
Contextual Info: MC10E104, MC100E104 5VĄECL Quint 2ĆInput AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be

E212 transistor

Abstract: E112 E212 MC100E112 MC100E112FN MC10E112 MC10E112FN MC10E112FNR2 D200-400
Contextual Info: MC10E112, MC100E112 5VĄECL Quad Driver The MC10E/100E112 is a quad driver with two pairs of OR/NOR outputs from each gate, and a common, buffered enable input. Using the data inputs the device can serve as an ECL memory address fan-out driver. Using just the enable input, the device serves as a clock

marking CODE D2B

Abstract: MC100E104 MC100E104FN MC100E104FNR2 MC10E104 MC10E104FN MC10E104FNR2 marking D3B ECL IC NAND
Contextual Info: MC10E104, MC100E104 5VĄECL Quint 2ĆInput AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be

E116

Abstract: MC100E116 MC100E116FN MC100E116FNR2 MC10E116 MC10E116FN MC10E116FNR2
Contextual Info: MC10E116, MC100E116 5VĄECL Quint Differential Line Receiver The MC10E/100E116 is a quint differential line receiver with emitter-follower outputs. For applications which require bandwidths greater than that of the E116, the E416 device may be of interest.

MC100E131FNR2

Abstract: MC100E131 MC100E131FN MC10E131 MC10E131FN MC10E131FNR2 max5870
Contextual Info: MC10E131, MC100E131 5VĄECL 4ĆBit D FlipĆFlop The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock CC LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE

max5870

Abstract: MC100E131 MC100E131FN MC100E131FNR2 MC10E131 MC10E131FN MC10E131FNR2
Contextual Info: MC10E131, MC100E131 5VĄECL 4ĆBit D FlipĆFlop The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock CC LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE

E141

Abstract: E241 MC100E141 MC100E141FN MC100E141FNR2 MC10E141 MC10E141FN MC10E141FNR2 TRANSISTOR bd 181
Contextual Info: MC10E141, MC100E141 5VĄECL 8ĆBit Shift Register The MC10E/100E141 is an 8-bit full-function shift register. The E141 performs serial/parallel in and serial/parallel out, shifting in either direction. The eight inputs D0 – D7 accept parallel input data, while

MA E411

Abstract: AND8020 MC10E111 MC10E411 MC10E411FN MC10E411FNR2
Contextual Info: MC10E411 5VĄECL 1:9 Differential PECL/NECL RAMBus Clock Buffer The MC10E411 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The MC10E411’s function and performance are similar to the popular MC10E111, with the added feature of 1.2 V output swings.

Contextual Info: MC10E116, MC100E116 5VĄECL Quint Differential Line Receiver The MC10E/100E116 is a quint differential line receiver with emitter-follower outputs. For applications which require bandwidths greater than that of the E116, the E416 device may be of interest.

MC100E116

Abstract: MC100E116FN MC100E116FNR2 MC10E116 MC10E116FN MC10E116FNR2 E116
Contextual Info: MC10E116, MC100E116 5VĄECL Quint Differential Line Receiver The MC10E/100E116 is a quint differential line receiver with emitter-follower outputs. For applications which require bandwidths greater than that of the E116, the E416 device may be of interest.

MC100E131

Abstract: MC100E131FN MC100E131FNR2 MC10E131 MC10E131FN MC10E131FNR2
Contextual Info: MC10E131, MC100E131 5VĄECL 4ĆBit D FlipĆFlop The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock CC LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE

E141

Abstract: E241 MC100E141 MC100E141FN MC100E141FNR2 MC10E141 MC10E141FN MC10E141FNR2
Contextual Info: MC10E141, MC100E141 5VĄECL 8ĆBit Shift Register The MC10E/100E141 is an 8-bit full-function shift register. The E141 performs serial/parallel in and serial/parallel out, shifting in either direction. The eight inputs D0 – D7 accept parallel input data, while

MC100E457

Abstract: MC100E457FN MC100E457FNR2 MC10E457 MC10E457FN MC10E457FNR2 marking CODE D2B
Contextual Info: MC10E457, MC100E457 5VĄECL Triple Differential 2:1 Multiplexer The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The fully differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. The higher frequency outputs provide the device with a > 1.0 GHz

MC100E457FN

Abstract: MC100E457FNR2 MC10E457 MC10E457FN MC10E457FNR2 MC100E457
Contextual Info: MC10E457, MC100E457 5VĄECL Triple Differential 2:1 Multiplexer The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The fully differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. The higher frequency outputs provide the device with a > 1.0 GHz