LINE CODING Search Results

transistor mark code t1

Abstract: HDB3 to Unipolar Binary Code HDB3 coaxial link AN573 AN-573-1 decoding of non return to zero format pcm transcoder ami HDB3 to nrz Transistor Substitution nrz to hdb3
Contextual Info: Harris Semiconductor No. AN573.1 Harris Linear January 1997 The HC-5560 Digital Line Transcoder Author: David J. Donovan Introduction Unipolar Coding The Harris HC-5560 digital line transcoder provides mode selectable, pseudo ternary line coding and decoding schemes

transistor mark code t1

Abstract: AN573 LTE repeater ICS Interference HDB3 to Unipolar Binary Code HC-5560 PCM30 TRANSISTOR SUBSTITUTION HDB3 coaxial link decoding of return to zero format HDB3 can use where
Contextual Info: The HC-5560 Digital Line Transcoder TM Application Note January 1997 AN573.l Introduction Unipolar Coding The Intersil HC-5560 digital line transcoder provides mode selectable, pseudo ternary line coding and decoding schemes for North American and European transmission lines. Coding

Transistor Substitution

Abstract: HDB3 bin ENCODER DECODER b6zs encoding HDB3 to nrz AN573 HC-5560 PCM30 t1c transistor RETURN TO ZERO PCM encoder circuit ami
Contextual Info: The HC-5560 Digital Line Transcoder Application Note January 1997 AN573.l Introduction Unipolar Coding The Intersil HC-5560 digital line transcoder provides mode selectable, pseudo ternary line coding and decoding schemes for North American and European transmission lines. Coding

Contextual Info: Microelectronics T7289A DS1 Line Interface Features Description • Fully integrated DS1 line interface The T7289A DS1 Line Interface is an integrated cir­ cuit that provides a line interface between the DS1 crossconnect DSX and terminal equipment circuits

B00V

Abstract: 28365 HDB3 line coding M28335
Contextual Info: 28365-PBD-004-A February 5, 2003 CX28364/5/6 Non-conformance Product Affected: CX28364/5/6 – All Revisions 1. Incorrect Counting of Line Coding Violations in B3ZS and HDB3 Modes Description When the device is set to operate in B3ZS DS3 or HDB3 (E3) line coding, some line coding

tip to ring capacitance att loop test

Contextual Info: Semiconductor Corporation T1 Line Interface Features General Description • Provides Analog T1 Line Interface The CS61544 combines the analog transmit and receive line interface functions for a T1 system interface in one 28 pin device. The T1 line interface operates

B8ZS

Abstract: 0553-5006-IC CS61544-ID PE-64931 67115100 0553-5006ic CS61544-IL CS61544-IP CXT6176 B8ZS* encoding
Contextual Info: Semiconductor Corporation T1 Line Interface Features General Description • Provides Analog T1 Line Interface The CS61544 combines the analog transmit and receive line interface functions for a T1 system interface in one 28 pin device. The T1 line interface operates

tv block diagram

Contextual Info: Semiconductor Corporation T1 Line Interface Features General Description • Provides Analog T1 Line Interface The CS61544 combines the analog transmit and receive line interface functions for a T1 system interface in one 28 pin device. The T1 line interface operates

line coding

Abstract: 28348-PBD-002-A HDB3 hdb3 alarm M28335 B00V PBD002A
Contextual Info: 28348-PBD-002-A February 5, 2003 CX28342/3/4/6/8 Non-conformance Product Affected: CX28342/3/4/6/8 – All Revisions 1. Incorrect Counting of Line Coding Violations in B3ZS and HDB3 Modes Description When the device is set to operate in B3ZS DS3 or HDB3 (E3) line coding, some line coding

8253 intel microprocessor block diagram

Abstract: AMI encoding PM 8910 4078 relay circuit diagram CX28332 CX28333 CX28342 CX28343 CX28344 CX28346
Contextual Info: 00-1445_cx28348-6-4-3-2.qxd 9/18/00 2:27 PM Page 1 features and Product Features Line Interface/Line Coding In-Service Performance Monitoring • DS3: B3ZS, NRZ, AMI • E3: HDB3, NRZ, AMI • Independent transmit and receive line coding modes • Receiver 16-bit FIFO buffer for reducing jitter

TND 400

Contextual Info: Datasheet May 1998 m icroelectronics group Lucent Technologies Bell Labs Innovations T7690 5.0 VT1/E1 Quad Line Interface T7693 3.3 VT1/E1 Quad Line Interface Features Description • Four fully integrated T1/E1 line interfaces The T7690 and T7693 are fully integrated quad line

T7290A

Abstract: T7690 T7693 78lgndc HIT 7070
Contextual Info: Data Sheet May 1998 m icroelectronics group Lucent Technologies Bell Labs Innovations T7690 5.0 VT1/E1 Quad Line Interface T7693 3.3 VT1/E1 Quad Line Interface Features Description • Four fully integrated T1/E1 line interfaces The T7690 and T7693 are fully integrated quad line

Contextual Info: Data Sheet February 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7690 5.0 V DS1/E1 Quad Line Interface T7693 3.3 V DS1/E1 Quad Line Interface Features Description • Four fully integrated DS1/E1 line interfaces The T7690 and T7693 are fully integrated quad line

txc 24.5

Abstract: E2 hdb3 TXC-21055 1N4148 1N914 AN-517 PE-65966 TXC-02050C ME502B A2917
Contextual Info: MRT Device 6-, 8-, 34- Mbit/s Line Interface TXC-02050C FEATURES DESCRIPTION • 6312/8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit MRT Line Interface is a CMOS VLSI device that provides the functions needed for terminating two ITU-T line rates,

Contextual Info: MRT Device 6-, 8-, 34- Mbit/s Line Interface TXC-02050C FEATURES DESCRIPTION • 6312/8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit MRT Line Interface is a CMOS VLSI device that provides the functions needed for terminating two ITU-T line rates,

Contextual Info: CS61535A Semiconductor Corporation PCM Line Interface Features General Description • Provides Analog PCM Line Interface for T1 and PCM-30 Applications The CS61535 and CS61535A combine the analog transmit and receive line interface functions for a T1/PCM-30 interface in a single 28-pin device. The line

Contextual Info: » JBN 2 7 19 Data Sheet January 1992 i ^ A T sT Microelectronics T7289A DS1 Line Interface Features Description • Fully integrated DS1 line interface The T7289A DS1 Line Interface is an integrated circuit that provides a line interface between the DS1 crossconnect DSX and terminal equipment circuits

Contextual Info: W R î- ' t^ 2 Data Sheet March 1992 , â A T s r Microelectronics T7288 CEPT1 Line Interface Features Description • Fully Integrated 2.048 M bits/s line interface The T7288 CEPT1 Line Interface is an integrated circuit that provides a 2.048 M bits/s line interface to

Contextual Info: JlAT&T Data Sheet March 1992 = ^ ^ ^ M ic ro e le c tro n ic s T7289A DS1 Line Interface Features Description • Fully integrated DS1 line interface The T7289A DS1 Line Interface is an integrated circuit that provides a line interface between the DS1 crossconnect DSX and terminal equipment circuits

7289a

Abstract: LTC 4361 LC1046C T7289A T7289A-EL T7289A-PL AY93-025TCOM LC1046
Contextual Info: group Data Sheet January 1998 Lucent Technologies Bell Labs Innovations T7289A DS1 Line Interface Features Description • Fully integrated DS1 line interface The Lucent Technologies Microelectronics Group T7289A DS1 Line Interface is an integrated circuit

Contextual Info: Data Sheet March 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7289A DS1 Line Interface Features Description • Fully integrated DS1 line interface The Lucent Technologies Microelectronics Group T7289A DS1 Line Interface is an integrated circuit

ATPLCOUP006

Abstract: ATPLCOUP002 ATPLCOUP001 PLC coupling OFDM
Contextual Info: ATPL Series Power Line Communications Device ATPL230A DATASHEET Description ATPL230A is a power line communications base band modem, compliant with the PHY layer of PRIME Power Line Intelligent Metering Evolution specification. PRIME is an open standard

Contextual Info: Data Sheet March 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7289A DS1 Line Interface Features Description • Fully integrated DS1 line interface The Lucent Technologies Microelectronics Group T7289A DS1 Line Interface is an integrated circuit

T-13220G

Abstract: 850C
Contextual Info: U Interface Transformer 2B1Q Coding Applications Designed for use with National TP 3410 Turns Ratio ( + 3 % ) (Line : Chip) 1.50 : 1 REINFORCED INSULATION PARAMETER MIN. MAX. UNITS Primary Inductance (Line Side) 25.4 28.6 mH Primary DC Resistance 20 ohms