LH521002C Search Results

LH521002C Datasheets (8)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
LH521002CK-17		Sharp	SRAM GP Single Port	Original	PDF	92.5KB	12
LH521002CK-20		Sharp	SRAM GP Single Port	Original	PDF	92.5KB	12
LH521002CK-25		Sharp	SRAM GP Single Port	Original	PDF	92.5KB	12
LH521002CK-35		Sharp	SRAM GP Single Port	Original	PDF	92.5KB	12
LH521002CNK-17		Sharp	SRAM GP Single Port	Original	PDF	92.5KB	12
LH521002CNK-20		Sharp	SRAM GP Single Port	Original	PDF	92.5KB	12
LH521002CNK-25		Sharp	SRAM GP Single Port	Original	PDF	92.5KB	12
LH521002CNK-35		Sharp	SRAM GP Single Port	Original	PDF	92.5KB	12

LH521002C Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: LH521002C SHARP CMOS 256K x 4 Static RAM Data Sheet FEATURES The ‘L’ version will retain data down to a supply voltage of 2 V. A significantly lower current can be obtained Idr under this Data Retention condition. CMOS Standby Current (lSB2) ¡s reduced on the ‘L’ version with respect to	OCR Scan	28-pin, 300-mil 400-mil LH521002C 28SOJ400 LH521 28-Din.	PDF
Contextual Info: SHARP LH521002C CMOS 256K x 4 Static RAM Data Sheet The ‘L’ version will retain data down to a supply voltage of 2 V. A significantly lower current can be obtained Idr under this Data Retention condition. CMOS Standby Current (lSB2) is reduced on the ‘L’ version with respect to	OCR Scan	LH521002C 28-pin, 300-mil 400-mil 300-MILSOJ 28SOJ SOJ28-P-4QO)	PDF
SOJ28-P-400 Contextual Info: LH521002C CMOS 256K x 4 Static RAM Data Sheet The ‘L’ version will retain data down to a supply voltage of 2 V. A significantly lower current can be obtained IDR under this Data Retention condition. CMOS Standby Current (ISB2) is reduced on the ‘L’ version with respect to	Original	LH521002C 2613-banchi, J63428 SMT94020 SOJ28-P-400	PDF
Spil polyimide system in package Abstract: B-629 Contextual Info: SHARP LH521007C Data Sheet CMOS 128K X 8 Static RAM FEATURES When both Chip Enables are active and W is inactive, a static Read will occur at the memory location specified by the address lines. G must be brought LOW to enable the outputs. Since the device is fully static in operation,	OCR Scan	32-Pin, 300-mil 400-mil LH521007C 576-bit -65sC~ 2604C 1500G, LH521002CK Spil polyimide system in package B-629	PDF