LAD T2 Search Results

intel 8203

Abstract: RTL 8188 82580 82575 0x1528 electromagnetic pulse kit INTEL 845 MOTHERBOARD CIRCUIT diagram foxconn ls 36 motherboard manual 8237 direct memory access controller 81217
Contextual Info: Intel 82580 Quad/Dual Gigabit Ethernet LAN Controller Datasheet LAN Access Division LAD FEATURES External Interfaces Provided: • Virtualization Ready: PCIe v2.0 (5Gbps and 2.5Gbps) x4/x2/x1; called PCIe in this document. • Enhanced VMDq1 support: •

JFM38

Abstract: hx 740
Contextual Info: Intel Ethernet Controller I210 Datasheet LAN Access Division LAD Features: • • • • • • • • Small package: 9 x 9 mm PCIe v2.1 (2.5 GT/s) x1, with Switching Voltage Regulator (iSVR) Integrated Non-Volatile Memory (iNVM) Three single port SKUs: SerDes, Copper, Copper IT

Contextual Info: 9 3 2 5 8 1 2 . U N IT E D iiV M IC R O E L E C T R O N IC S 92D 00730 D 7 ^ < /9 -/3 ~ o 2 ^ I O U M 3135 e -o /g /f lAD VAw cgp p ro d u c t pësc b ip tio k . t C M O S _ s i n g i e - C M p t m Calculator Features • Number of digits — 8 digits rough estimate calculation possible .

LC1-D40

Abstract: la2 dt2 LA3 DR2 BOBINAS w9 0444935 LA2 DS2 LA1 DN22 LC1-D40 DIMENSIONS LC2-D40 LADN10
Contextual Info: КОНТАКТОРЫ / РЕВЕРСИВНЫЕ КОНТАКТОРЫ W9 0444935 0114 A05 08/2007 LC1/LC2 - D40 D50 D65 D80 D95 LC1 LC2 L1 L2 L3 A1 A2 21 KM2 1 3 5 13 21 L1 L2 L3 NO NC A1 A2 1 2 3 4 5 1 6 2 3 4 5 A1 6 22 22 A2 A2 A1 A2 T1 T2 T3 2 4 6 14 22 21

DIODE T25 4-k5

Abstract: MPC8544DS AN2582 AN2583 AN2910 AN3369 lad n22 sr-ds04 6 pins IC cbe e500 I2C boot sequencer
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3641 Rev. 2, 02/2009 MPC8533E PowerQUICC III Bring-up Guide This document provides recommendations for new designs based on the MPC8533E PowerQUICC III family of integrated host communications processors collectively

sr-ds04

Abstract: MPC8544ERM MPC8544EEC 8E-13 AN2582 AN2583 AN3369 MPC8544 1ab18 2AB17
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3547 Rev. 2, 02/2009 MPC8544E PowerQUICC III Bring-up Guide This document provides recommendations for new designs based on the MPC8544E PowerQUICC III family of integrated host communications processors collectively

Contextual Info: O M lF < § » Ä T D [ i i] in te i 80960MC EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT AND MEMORY MANAGEMENT UNIT Military High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at

Contextual Info: Ä G S M A N G E O M [F iG M T D @ të 80960XA EMBEDDED 32-BIT MICROPROCESSOR WITH 33RD TAG BIT TO SUPPORT OBJECT-ORIENTED PROGRAMMING AND DATA SECURITY Military • On-Chip Memory Management Unit — 4 Gigabyte Linear Address Space per Task — 4 Kbyte Pages with Supervisor/User

Contextual Info: intei 80960MC EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT AND MEMORY MANAGEMENT UNIT Military On-Chip Memory Management Unit — 4 Gigabyte Virtual Address Space per Task — 4 Kbyte Pages with Supervisor/User Protection High-Performance Embedded

D15105

Abstract: 44fl5 271060 754for
Contextual Info: in te i 80960MC EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT AND MEMORY MANAGEMENT UNIT Military High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS1 Sustained Execution at 25 MHz On-Chip Memory Management Unit

Contextual Info: ÄEW M i DNHF@IRßM!rilON in y 80960MC EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT AND MEMORY MANAGEMENT UNIT Military High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at

MPC8536DS

Abstract: SDHC protocol gvdd24 MPC8536E SDHC PINOUT 6/18/MPC8536DS sdhc SDHC schematic tsec USB1
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3660 Rev. 0, 02/2009 MPC8536E PowerQUICC III Bring-Up Guide This application note provides recommendations for new designs based on the MPC8536E PowerQUICC™ III family of integrated host communications processors collectively

Contextual Info: 5hE D • M fl2bl7S INTEL 011M07S CORP 402 ■ IT L 1 U P/PR PH LS 80960KA EMBEDDED 32-BIT PROCESSOR ■ Built-In Interrupt Controller — 32 Priority Levels 256 Vectors — 3.4 jlis Latency @ 25 MHz _ Easy to Use, High Bandwidth 32-Bit Bus — 66.7 Mbytes/s Burst

Contextual Info: in te i i960 KA/KB PROCESSOR PRODUCT OVERVIEW INTRODUCTION This chapter provides an overview of the Intel i960 KB processor which is part of the i960 K series of embedded-processor products . All of the processors in the i960 K series of products are based on the Intel i960™ architecture. Most of the

Contextual Info: 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING POINT UNIT High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz Built-In Interrupt Controller — 31 Priority Levels, 256 Vectors

AN3940

Abstract: MPC8536-ADK MPC8536DS AN3869 MPC8536ERM AN4039 eSPI guide freescale MDIC 02 tsec android usb
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3660 Rev. 1, 01/2011 MPC8536E PowerQUICC III Bring-Up Guide This application note provides recommendations for new designs based on the MPC8536E PowerQUICC III family of integrated host communications processors collectively

a2724

Abstract: SST49LF080A
Contextual Info: 8 Mbit LPC Flash SST49LF080A SST49LF080A8 Mbit LPC Flash Data Sheet FEATURES: • LPC Interface Flash – SST49LF080A: 1024K x8 8 Mbit • Conforms to Intel LPC Interface Specification 1.0 • Flexible Erase Capability – Uniform 4 KByte Sectors – Uniform 64 KByte overlay blocks

ta80960kb

Abstract: LADI 12V VAX-11
Contextual Info: 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING POINT UNIT • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped

SST49LF080A

Abstract: fe8c
Contextual Info: 8 Mbit LPC Flash SST49LF080A SST49LF080A8 Mbit LPC Flash Data Sheet FEATURES: • LPC Interface Flash – SST49LF080A: 1024K x8 8 Mbit • Conforms to Intel LPC Interface Specification 1.0 • Flexible Erase Capability – Uniform 4 KByte Sectors – Uniform 64 KByte overlay blocks

Contextual Info: intei 80960KA EMBEDDED 32-BIT MICROPROCESSOR • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped — Parallel Load/Decode for Uncached

SST49LF020A

Contextual Info: 2 Mbit LPC Flash SST49LF020A SST49LF020A2Mb LPC Flash Data Sheet FEATURES: • LPC Interface Flash – SST49LF020A: 256K x8 2 Mbit • Conforms to Intel LPC Interface Specification 1.0 • Flexible Erase Capability – Uniform 4 KByte Sectors – Uniform 16 KByte overlay blocks

49lf04

Contextual Info: 4 Mbit / 8 Mbit LPC Flash SST49LF040A / SST49LF080A SST49LF040A / SST49LF080A4 Mb / 8 Mbit LPC Flash Advance Information FEATURES: • LPC Interface Flash – SST49LF040A: 512K x8 4 Mbit SST49LF080A: 1024K x8 (8 Mbit) • Conforms to Intel LPC Interface Specification 1.0

MPC8548ERM

Abstract: MPC8548EEC MPC8548ECE sdrx2 DSAE003201 BSDL MPC8548 MPC8548E e500 I2C boot sequencer MPC8548 tsec
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3640 Rev. 2, 07/2009 MPC8548E PowerQUICC III Family Bring-Up Guide This document provides recommendations for new designs based on the MPC8548E PowerQUICC™ III family of integrated host communications processors collectively

49LF030A

Contextual Info: 3 Mbit / 4 Mbit / 8 Mbit LPC Flash SST49LF030A / SST49LF040A / SST49LF080A SST49LF030A/040A/080A3 Mb / 4 Mb / 8 Mb LPC Flash Advance Information FEATURES: • LPC Interface Flash – SST49LF030A: 384K x8 3 Mbit – SST49LF040A: 512K x8 (4 Mbit) – SST49LF080A: 1024K x8 (8 Mbit)