L93C Search Results

AL437

Abstract: L97c L235C L103T L41C L140C L94C l165c L239C L43C
Contextual Info: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC November 2003 Preliminary Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two

L130C

Abstract: L74c l31c l97c l65c A311TC l146c l48c L202C L235C
Contextual Info: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC May 2009 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two

XLS93C46-3

Abstract: XL93C46 XLE93C46-3 SK 702 XL93C46-3 93c46 wp Exel
Contextual Info: ROHM CORP/ EXEL NELECS k/fcrf bbE D • 7fiE‘i G m MICROELECTRONICS GÜDlb7S ST7 L93C46-3 Exot/tonetIn$ 1,024-Bit Serial 3V to 5V Electrically Erasable PROM with 2V Read Capability F E A TU R ES PIN C O N F IG U R A TIO N S ■ S tate-o f-th e-A rt A rch itecture

Contextual Info: ROHM C O R P / EXEL MELECS bbE D • VflETOlH G D Gl f l O b MICROELECTRONICS Tfll L93C66 Ex&lfonce In & 4,096-Bit Serial Electrically Erasable PROM with 2V Read Capability FE A TU R ES ■ ■ H ard w are and Softw are W rite Protection — D efaults to w rite-d isabled state at p ow er up

dog 11

Abstract: S93CS L93C
Contextual Info: e/ e L L93CS46 E x c e lle n c e in £ • 1,024-Bit Serial Electrically Erasable PRO M with 2V Read Capability FEATURES • — — — — — • PIN CONFIGURATIONS State-of-the-Art Architecture P lastic D u al-in -lin e T y p e “ P ” P ackag e Nonvolatile data storage

melecs

Contextual Info: ROHM CORP/ EXEL MELECS tbE » • 702=1014 0001751 MICROELECTRONICS T4M M R E M v f 2048-Bit Serial Electrically Erasable PROM with 2V Read Capability F E A TU R ES ■ PIN C O N FIG U R A TIO N S S tate-of-th e-A rt A rch itecture — N o nvolatile data storage

L47C

Abstract: L146C L135 l54c L62C L97C verilog code of prbs pattern generator L71C L235C L43C
Contextual Info: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC February 2005 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two

L211C

Abstract: 3100B L17c R68T l71c
Contextual Info: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC July 2004 Preliminary Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two

L43C

Abstract: L130C l44c L239C l220c L235C L97c L62C L81C l31c
Contextual Info: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC October 2007 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two