L7C187PC20 Search Results

Contextual Info: L7C187 64K x 1 Static RAM DEVICES INCORPORATED I FEATURES DESCRIPTION □ 64K x 1 Static RAM with Separate I/O , Chip Select Powerdown □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 12 ns maximum □ Low Power Operation Active: 225 mW typical at 25 ns

Contextual Info: L7C187 J r. V i ; E K 6 4 K x 1 S t a t ic R A M r . C O H - ’C M A T F DESCRIPTION FEATURES □ 64K x 1 Static RAM with Separate I/O , Chip Select Powerdown □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 12 ns maximum □ Low Power Operation

L7C187PC20

Abstract: CY7C187 IDT7187 L7C187CC15 L7C187CC20 L7C187PC12 L7C187PC15 L7C187 64k x 1 static ram
Contextual Info: L7C187 L7C187 DEVICES INCORPORATED 64K x 1 Static RAM 64K x 1 Static RAM DEVICES INCORPORATED FEATURES DESCRIPTION q 64K x 1 Static RAM with Separate I/O, Chip Select Powerdown q Auto-Powerdown Design q Advanced CMOS Technology q High Speed — to 12 ns maximum

L7C187PC25

Abstract: L7C187PC20 CON12 CY7C187 L7C187PC15 L7C187PC35 L7C187PC45 L7C187PC85 L7C187UC85
Contextual Info: L7C187 64K x 1 Static RAM Features Description □ 64K by 1 Static RAM with separate I/O , Chip Select power down The L7C187 is a high-performance, low-power CMOS static Random Access Memory. The storage circuitry is organized as 65,536 words by 1 bit per word. Parts are available in six

Contextual Info: L7C187 64K x 1 Static RAM Features_ Description_ □ 64K by 1 Static RAM with separate I/O , Chip Select power down The L7C187 is a high-performance, low-power CMOS static Random Access Memory. The storage circuitry is organized as 65,536 words by 1 bit

Contextual Info: L7C187 L7C187 DEVICES INCORPORATED 64K x 1 Static RAM 64K x 1 Static RAM DEVICES INCORPORATED DESCRIPTION L7C187 BLOCK DIAGRAM O ROW SELECT 8 as 2 V. The L7C187 consumes only 30 µW typical at 3 V, allowing effective battery backup operation. The L7C187 provides asynchronous

Contextual Info: L7C187 6 4 K x 1 S t a t ic R A M DESCRIPTION FEATURES □ 64K x 1 Static RAM with Separate I/O , Chip Select Powerdown □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 12 ns maximum □ Low Power Operation Active: 225 mW typical at 25 ns