L6TI Search Results

k4s643232f

Abstract: KS RMII Reduced MII aa2c "routing tables"
Contextual Info: PacketTrunk-4 Device TDMoIP/MPLS Gateway Device TXC-05870 DESCRIPTION • Four T1/E1/Serial or one T3/E3 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC, interface via MII/RMII/SMII/SSMII; HDX or FDX • VLAN support per IEEE 802.1 p & Q • Four independent advanced clock recovery blocks

TCXO A31 10MHZ

Abstract: MT48LC4M32B2TG-6 L1V16 Datum OCXO
Contextual Info: PRELIMINARY PRODUCT BRIEF: SUBJECT TO CHANGE Rev: 091407 DS34S108, DS34S104, DS34S102, DS34S101 Description Abridged General Description Features The IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34S108 allows up to eight T1/E1 links or frame-based serial HDLC links to be

Contextual Info: Rev: 032609 DS34S101, DS34S102, DS34S104, DS34S108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial

TXC-06010-MB

Abstract: TXC-06010 samsung Capacitance lables transwitch packettrunk fifo synchronus asynchronus PacketTrunk
Contextual Info:  PacketTrunk-4 Plus Device TDMoIP/MPLS Gateway Device TXC-06010 DATA SHEET PRODUCT PREVIEW TXC-06010-MB, Ed. 2 June 2006 FEATURES APPLICATIONS • Four T1/E1/Serial or one T3/E3 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC interface via MII/RMII/SMII/SSMII; HDX or

Contextual Info: Rev: 032609 DS34S101, DS34S102, DS34S104, DS34S108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial

Contextual Info: IC42S32200 IC42S32200L Document Title 512K x 32 Bit x 4 Banks 64-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B Initial Draft Obselete partial refresh function Obselete 5ns speed grade Change ICC3P from 3mA to 5mA September 26,2002 September 05,2003

Contextual Info: PacketTrunk-4 Device TDMoIP/MPLS Gateway Device TXC-05870 DESCRIPTION • Four T1/E1/Serial or one T3/E3/STS-1 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC, interface via MII/RMII/SMII/SSMII; HDX or FDX • VLAN support per IEEE 802.1 p & Q • Four independent advanced clock recovery blocks

IC42S32800

Abstract: 2M Words x 32 Bits x 4 Banks (256-MBIT) IC42S32800L L6TI 2M Words x 32 Bits x 4 Banks 256-MBIT
Contextual Info: IC42S32800 IC42S32800L Document Title 2M x 32 Bit x 4 Banks 256-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B Initial Draft Revise Page22 typo October 05,2004 December 21,2004 Remark The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and

IC42S32200

Abstract: IC42S32200L
Contextual Info: IC42S32200 IC42S32200L Document Title 512K x 32 Bit x 4 Banks 64-MBIT SDRAM Revision History Revision No History Draft Date Remark 0A Initial Draft September 26,2002 Preliminary The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and

RFC-5087

Abstract: TXC-06010AIBG TXC-06010-MB K4S283232E 0X0076 cesopsn TXC-06010
Contextual Info: PacketTrunk-4 Plus Device TDM-over-Packet Gateway Device TXC-06010 DATA SHEET PRELIMINARY TXC-06010- MB, Ed. 6 December 2009 FEATURES APPLICATIONS • Four T1/E1/Serial or one T3/E3 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC interface via MII/RMII/SMII/SSMII;HDX or

diode CH9d

Abstract: CH7C diode CH8C diode diode ch6b rg703 Diode TS21C diode code eb13 RFC-5087 10407C 2125S
Contextual Info: 19-4835; 8/09 DS34T101, DS34T102, DS34T104, DS34T108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial

IC42S32200

Abstract: IC42S32200L DR036-0D
Contextual Info: IC42S32200 IC42S32200L Document Title 512K x 32 Bit x 4 Banks 64-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B Initial Draft Obselete partial refresh function Obselete 5ns speed grade Change ICC3P from 3mA to 5mA Revise typo Revise p.20,p.22 data and p.28 typo

IC42S32400

Abstract: IC42S32400L
Contextual Info: IC42S32400 IC42S32400L Document Title 1M x 32 Bit x 4 Banks 128-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B 0C Initial Draft Revise Page22 typo Revise p.22 data and p.28 typo December 01,2003 December 21,2004 February 01,2005 Remark

TS21C

Contextual Info: 19-4835; 8/09 DS34T101, DS34T102, DS34T104, DS34T108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial

TXC-06010

Contextual Info: PacketTrunk-4 Plus Device TDM-over-Packet Gateway Device TXC-06010 DATA SHEET PRELIMINARY TXC-06010- MB, Ed. 5 January 2008 FEATURES APPLICATIONS • Four T1/E1/Serial or one T3/E3 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC interface via MII/RMII/SMII/SSMII;HDX or

hynix ddr ram

Contextual Info: PacketTrunk-4 Device TDMoIP/MPLS Gateway Device TXC-05870 DESCRIPTION • Four T1/E1/Serial or one T3/E3/STS-1 TDM interfaces • One 10/100 Ethernet IEEE 802.3 MAC, interface via MII/RMII/SMII/SSMII; HDX or FDX • VLAN support per IEEE 802.1 p & Q • Four independent advanced clock recovery blocks

e1 E2 e3 liu transceiver

Contextual Info: PRELIMINARY-SUBJECT TO CHANGE ABRIDGED DATA SHEET Rev: 091407 DS34S101//DS34S102/DS34S104/DS34S108 Single/Dual/Quad/Octal TDM-Over-Packet Transport Devices General Description The IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34S108 allows up to eight T1/E1

Contextual Info: ABRIDGED DATA SHEET Rev: 040108 DS34S101//DS34S102/DS34S104/DS34S108 Single/Dual/Quad/Octal TDM-Over-Packet Transport Devices General Description The IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC RFC-compliant DS34S108 allows up to eight T1/E1 links or frame-based serial HDLC links to be