L4932 Search Results

Contextual Info: J B M ELECTRONICS INC SDE ]> 4fiT4072 GOOOObO 474 B J B M T -4 7 -1 3 Delay Range 5-500 nsec STYLE L-49 14-pin DIP untapped, multi delay .800 nom • INPUT CONDITIONS (See Page 2) U U J.020*. 7 Operating Temp. 0°C to + 70° C Storage Temp

L1239

Abstract: l0728 l0312 SGS L282 L0936 L11616 L9960 0x00000404 L1198 L1322
Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _

L49-118

Contextual Info: Delay Range 5-500 nsec STYLE L-49 14-pin DIP untapped, multi delay INPUT CONDITIONS (See Page 2) Operating T em p.0 ° C t o + 7 0 ° C Storage T e m p .~ 5 5 ° C to + 1 2 5 °C (A il lin e s in te rn a lly te rm in a te d )

HIOKI 3287

Abstract: P1201A crest audio pro 8200
Contextual Info: 2014 Electrical Measuring Instruments General Catalog Recorders Data loggers Power Meters LCR Testers Battery Testers Current Probes Clamp Sensors Recorders / Data Loggers / Remote Measurement System / Component Measuring Instruments / Signal Sources / Safety Standards Measuring Instruments

L4204

Abstract: L9960 L0520 l0416 L1404 L9804 l2904 l0312 L4984 L1144
Contextual Info: ˆABEL 5.02 Data I/O Corp. JEDEC file for: MACH220A V1.3 Created on: Tue Oct 24 14:11:20 1995 PLX TECHNOLOGY PROPRIETARY INFORMATION FIFO: FIFO Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 7.0 10-23-95 Copyright PLX Technology, 1995

L0936

Abstract: l0728 L1239 L0988 L9960 l0312 l0832 L4204 l0416 L9804
Contextual Info: module busctl title ’ PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 3.0 10-20-95 Copyright PLX Technology, 1995 ’ "device declaration

la2 d2 timer

Abstract: L0936 Header 13X2 l0728 PIN DIAGRAM OF IC LM7805 U0202 L9960 STI3400 L1239 L4204
Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PLX Technology SGS PCI MPEG Board Engineering Changes 07/15/96 1. The PCI9060 always reads long words, even when the local bus is configured for 16-bits. Modify the BUSCTL

L0936

Abstract: L0988 L9960 L1239 STI3400 L1462 E442 L1105 L3216 U0601
Contextual Info: Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _ General Description _ Features_

49119

Abstract: L49-118 L49-309 L-49-109 L493X 4911-3 L49213 49109 L49-201
Contextual Info: Traditional TTL Buffered Delay Lines Delay Range 5-500 nsec STYLE L-49 14-pin DIP untapped, multi delay INPUT CONDITIONS (See Page 2) Operating Temp Storage Temp 025" -►I (♦ 050 0 ° C to + 7 0 ° C - 5 5 °C to + 125°C (A ll lin e s in te rn a lly te rm in a te d )