L3B72S2 Search Results
L3B72S2 Datasheets Context Search
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9 -B it ECL/TTL Translator The MC10H/100H601 is a 9-bit, dual supply ECL to TTL translator. Devices in the Motorola 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance. |
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mc10h/100h60128-leadb3b72sedl122 | |
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 4:1 Differential M ultiplexer MC10EL57 MC100EL57 The MC10/100EL57 is a fully differential 4:1 multiplexer. By leaving the SEL1 line open pulled LOW via the input pulldown resistors the device can also be used as a differential 2:1 multiplexer with SELO input |
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mc10el57mc100el57mc10/100el57dl140+1 | |
725hContextual Info: motorola SC -CLOGIO D5 b3f ci 7E55 0000143 5 T -V 3 '2 | MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC51 2-W ide, 2-ln p u t/2 -W id e , 3-In p u t A N D -N O R Gates High-Performance Silicon-Gate CMOS The MC54/74HC51 is identical in pinout to the LS51. The device inputs are com |
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mc54/74hc51725h | |
MC14029BELContextual Info: MOTOROLA 6 3 .6 7 2 5 2 .M O TO R O LA SC { L O G I C } Tfi D e | L,3t.72SS G Q 7 T S 1 G 980 > 9 5 1 0 S C „ L O G IC J ^ M O T O R O D 9 S -2 3 -/7 MC14029B L A CMOS MSI (LO W -PO W ER C O M P L E M E N T A R Y M OS) B IN A R Y /D E C A D E UP/DOWN COUNTER |
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mc14029bc14029bmc14029bel | |
C12509Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C12009 MC12011 M C12013 Dual Modulus Prescaler These devices are tw o-m odulus prescalers which will divide by 5 and 6, 8 and 9, and 10 and 11, respectively. A M E C L-to-M T T L translator is provided to interface directly with the MC12014 Counter |
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mc12014mc12009mc12011mc12013+3 | |
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3-Bit Scannable Registered Address Driver MC10E212 MC100E212 The MC10E/100E212 is a scannable registered ECL driver typically used as a fan-out memory address driver for ECL cache driving. In a VLSI array based CPU design, use of the E212 allows the user to conserve |
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mc10e212mc100e212mc10e/100e2121025ps+1 | |
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3 -B it D iffe re n tia l Flip-Flop The MC10E/100E431 is a 3-bit flip-flop with differential clock, data input and data output. The asynchronous Set and Reset controls are edge-triggered rather than level controlled. This allows the user to rapidly set or reset the |
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mc10e/100e431l3b72s2dl140 | |
LS 2025Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8 -B it R ip p le C o u n te r M C 10E137 M C 100E137 The MC1OE/100E137 ¡3 a very high speed binary ripple counter. The two least significant bits were designed with very fast edge rates while the more significant bits maintain standard ECLinPS output edge rates. This allows |
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10e137100e137mc1oe/100e13775ki2+2 | |
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3-Bit Scannable Registered Bus Transceiver The MC10E/100E337 is a 3-bit registered bus transceiver with scan. The bus outputs BUS0-BUS2 are specified for driving a 25Q bus; the receive outputs (QO - Q2) are specified for 50£i. The bus outputs feature |
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mc10e/100e337mc10e337mc100e337l3b72s2+1 | |
74hc4020
Abstract: C4020 34 pin diagram of ic 74hc14 hc14 pinout
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3b72s2mc54/74hc402014-stagemc14020b+6 | |
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 6-Bit 2:1 Mux-Register The MC10E/100E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by |
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mc10e/100e167mc10e167mc100e1671000mhz+3 |