L 0701 Search Results

Contextual Info: XRT7300 E3/DS3/STS-1 Line Interface Unit January 2000 FEATURES l Single-chip Transmit and Receive Line Interface IC for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51.84Mbps) Applications l l Transmit Interface Characteristics l Accepts Either Single Rail or Dual Rail Data

LS 2822 M

Abstract: M39014 1- 1553 104k avx 1301 LS 2027 m39014 2-1350 0501 1237 01 4011 ABB 0698 2842 2843 3842 3843 3844 0429 01 2701 00 M390 1553
Contextual Info: MIL-PRF-39014/Radial Leads W L.D. T L.S. Figure 1 L W W W 1.250 Min. L.D. L.D. 1.250 Min. L.D. L.S. Figure 2 L.S. L T L T L L.S. Figure 3 Figure 4 HOW TO ORDER Military Type Designation: Styles CKR04, CKR05, CKR06, CKR08 Dash Number Option: MIL-PRF-39014/01 Appropriate Dash Number

M39014 5-2291

Abstract: LS 2027 MIL-PRF-39014 R K J 0822 3500 2231 M390 1549 LS 2822 p 01 k 2645 3570 1210 3570 1301
Contextual Info: MIL-PRF-39014/Radial Leads W L.D. T L.S. Figure 1 L W W W L.D. 1.250 Min. L.D. 1.250 Min. L.D. L.S. Figure 2 L.S. L T L T L L.S. Figure 3 Figure 4 HOW TO ORDER Military Type Designation: Styles CKR04, CKR05, CKR06, CKR08 Dash Number Option: MIL-PRF-39014/01 Appropriate Dash Number

Contextual Info: ( I & Q DEMODULATORS QUADRATURE I.F. MIXERS ) Conversion Amplitude Phase (2) Isolation (1) Carrier (LO) RF I&Q Loss Balance Balance L/R L/l VSWR (dB) Frequency Frequency Frequency (dB) (deg) (dB) (dB) (MHz) (MHz) (MHz) max. max. max. min. min. min. P/N

Contextual Info: Digitally Programmable data\<7^>/ Delay Units SERIES: PDU-10256H delay devicesVinc. 8-Bit E C L Interlaced Test Conditions Specifications: Features: • ■ ■ ■ ■ ■ L o w p ro p a g a tio n d e la y In p u t & o u tp u t E C L b u ffe r e d 8 - B IT E C L p r o g r a m m a b le d e la y lin e

PDU-1316

Abstract: PDU-1316-1 PDU-1316-12 PDU-1316-2 PDU-1316-5
Contextual Info: Digitally Programmable data delay SERIES: PDU-1316 Delay Units devices^me. 4-Bit TTL Interfaced Specifications: Test Conditions: • ■ ■ ■ In p u t s ig n a l re q u ire m e n t: T T L lo g ic . O u tp u t fa n -o u t: T T L S c h o ttk y lo a d s.

Contextual Info: ìF ast Logic Multiple Digital SER IES : MDU-38F Delay Units 8 pins DIP T T L Interfaced data \(/3\l delay p devices;inc. Features: • Auto-insertable. ■ Com pletely interfaced for TTL & DTL application. ■ P.C. board space economy achieved. ■ Fits standard 8 pins DIP socket.

Contextual Info: data Digitally Programmable delay \â PDU-10256 Delav Units ser|es; devices; inc. 1 8-Bit ECL Interfaced Specifications: • In p u t s ig n a l re q u ire m e n t: E C L lo g ic ■ O u tp u t fa n -o u t: E C L lo a d s Test Conditions ■ D ela y v a ria tio n : M o n o to n lc in o n e d ire c tio n

Contextual Info: MITSUBISHI MICROCOMPUTERS M35045-XXXSP/FP S C R E E N C H A R A C T E R a n d P A T T E R N D IS P L A Y C O N T R O L L E R S D E S C R IP T IO N The M 35045-XXXSP/FP is a TV screen display control 1C. It uses a PIN CONFIGURATION TOP VIEW silicon gate C M OS process and is housed in a 20-pin s h rin k DIP

Contextual Info: Surface Mount SYM-25DHW+ SYM-25DHW Frequency Mixer Level 17 LO Power +17 dBm 80 to 2500 MHz Maximum Ratings Features Operating Temperature • wide bandwidth, 80 to 2500 MHz • low conversion loss, 6.4 dB typ. • high IP3, 30 dBm typ. • good L-R isolation, 37 dB typ.; & L-I isolation, 36 dB typ.

Contextual Info: 4 T H IS D R A W IN G IS 3 U N P U B L IS H E D . C O P Y R IG H T BY ^ C O RELEASED E L E C T R O N IC S C O R P O R A T IO N . EOR ALL 2 P U B L IC A T IO N R IG H T S R E V IS IO N S RESERVED. G LTR C D D E S C R IP T IO N REV P E R / \ 2 4\ SLEEVE COLOR: YELLOW

Contextual Info: 4 T H IS D R A W IN G IS U N P U B L IS H E D . 3 R ELEASED FO R ALL C O P Y R IG H T BY 1 T C 0 E L E C T R O N IC S P U B L IC A T IO N R IG H T S 2 -, - REVISIONS A, 00 RESERVED. C O R P O R A T IO N . D E S C R IP T IO N B2 ZINC D PER R E VIS E D P ER

Contextual Info: 4 T H IS D R A W IN G IS 3 U N P U B L IS H E D . R ELEASED FO R ALL BY TYCO C O P Y R IG H T E L E C T R O N IC S 2 P U B L IC A T IO N R IG H T S R E V IS IO N S RESERVED. G C O R P O R A T IO N . 0: LTR H D E S C R IP T IO N REV PER ECR DATE 07-017037 DWN

431202036640 choke

Abstract: CEF 83 A 3 BLW85 ZL18 blw85 transistor test circuit
Contextual Info: PHILIPS INTERN A T I O N A L L.5E D 711Dfi2ti 00b33>4b Ô3Û • PHIN ■ I BLW85 _ A _ H.F./V.H.F. POWER TRANSISTOR N-P-N silicon planar epitaxial transistor intended for use in class-A, B and C operated mobile h.f. and v.h.f. transmitters with a nominal supply voltage of 12,5 V . The transistor is resistance stabilized and

Contextual Info: E F a s f L o g ic Programmable Pulse fip n p ra tn r series U C IIC Id lU l PPG-33F 3 Bit TTLInterfaced Features: • Precise pulse widths ■ 3-BIT address ■ 1 ns to 50 ns incrmental steps ■ Trigger inherent delay T do = 3.5 ns ± 2 ns T do = 5.0 ns ± 2 ns

Contextual Info: Light Emitting Diodes 7 X 1 0 matrix displays LM-0701 Series The LM-0701 series are 7 X 10 matrix •E x te rn a l dimensions Unit: mm displays which can be used in a wide variety of applications, including al­ Single color type ¿ 2 .4 phabet, numeric, symbol, and graphic

MC3361P

Abstract: Sprague Electric LT 5239 H uln 8203 ULN3862A kb 3910 aurel Power AMPLIFIER 6012 p 419 david bowie
Contextual Info: # dii P SPRAGUE 4 %: INTERIM ISSUE Specifications Subject to Change W ithout Notice May 1 3 ,1 9 8 4 _ ULN-3862A T H E M A R K OF R E L IA B IL IT Y Integrated Circuits » » . ULN-3862A LOW-POWER F-M l-F SYSTEM FEATURES W ide O p e ra tin g V o lta g e R an ge

Contextual Info: 19-0701; Rev 0; 12/06 KIT ATION EVALU E L B AVAILA 2.4W, Single-Supply, Class G Power Amplifier The MAX9730 features a mono Class G power amplifier with an integrated inverting charge-pump power supply. The charge pump can supply up to 500mA of peak output current over a 2.7VDC to 5.5VDC supply voltage

Contextual Info: 3 1 2 ±0.0 5 vD O m CO REF 26.67 • 0.82 i - 3.81 33.05 OUTLINE '•L\ \ z \ :S; 12 VIEW A : : . A M P ^ 7- NO d |o : 01.1 - 12PLAC E S ± 0 .1 2 -<t>3 o ö ’ü l ' Z - HOUSING ±0.1 7.62 D I A 3 ± 0 .1 2 P L A CE S Lfl CM d W ¥ 5 0 0 K 2-0A-MIN

Contextual Info: DS1553 PRELIMINARY DALLAS SEMICONDUCTOR DS1553 64K NV Y2KC Timekeeping RAM FEATURES PIN ASSIGNMENT • In te g ra te d N V S R A M , real tim e c lock, c rysta l, p o w e r- RST C A12 □ A7 □ A6 c A5 c A4 □ A3 c A2 c A1 A0 □ DQ0 c fail c o n tro l c irc u it a n d lithium e n e rg y s o u rce

Contextual Info: data delay devices^inc. Ta s t Logic Programmable Delay Units SERIES: PDU-16F 6-Bit TTL Interfaced F e a tu re s : Test Conditions: • In p u t & O u tp u t T T L b u ffe re d ■ 6 -B it T T L p r o g ra m m a b le d e la y lin e ■ T w o (2) S e p a ra te o u tp u ts ;

BLY89A

Abstract: transistor h 1061 Transistor bly89a D 1062 transistor transistor ALY 36 transistor 1971 yl 1060 Transistor ALY c2
Contextual Info: P H I L I P S IN T E R N A T IO N A L MAINTENANCE TYPE M IE D H 7 1 1 0 0 2 b 0 0 2 7 ^ 5 1 ^•P H IN BLY89A T~33~/3 V.H.F. POWER TRANSISTOR N-P-N epitaxial planar transistor intended for use in class-A, B and C operated mobile, industrial and m ilitary transmitters with a supply voltage of 13,5 V . The transistor is resistance stabilized. Every

Contextual Info: m60LPS CON 9NIMVÌiq -É-SM[^ » REV. D A T E 2 11/J U N /2 0 1 0 & DCN NO. 070121 DESCRIPTION DR. m a m s m K .K A I — CHK. DELETED CONTACT T I L T FORM B # APPD. APPD. YtmiRö 1 99 + 0 1 A □ r=i P —n A upj in E □ Ad 0.15 ±0.05 0.25 ±0.08 PITCH)

Toshiba 2SD844

Abstract: Toshiba 2SB754 p 818 opto 2SB754 2SD844 u7617
Contextual Info: TOSHIBA DE 1 ^ 0 ^ 7 5 5 0 ~SÍ {DISCRETE/OPTO} GGGTfll? 4 J ~ / 9 0 9 7 2 5 0 T O S H IB A 5 ò C CDI S C R E T E /O P T O 2SD844 SILICO N U7Ô17 NPN T R I P L E D I F F U S E D T Y P E Unit in mm HIGH CURRENT SWITCHING A P P L IC A T IO N S . 05.Z±O.2