JX DC E24 Search Results

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Abstract: processor cross reference D-10 D-12 D-16 D-18 D-19 5252 F 1118 intel i960 RISC nsp 1337
Contextual Info: i960 Jx Microprocessor Developer’s Manual Release Date: December, 1997 Order Number: 272483-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of

F3826

Contextual Info: 23456784539A6BCDEF7C699345674F976BCDEF7C6 1 A9C9E79845633E92D364538C9A 2969E73D9!C6DC399"7C3 A9EC39#759BF892D3645738C9A 29F69E73D9!C6DC3997C3 C2 *36+436,61234286544 (-./606!!(

smd code wKX

Abstract: samsung nc110 samsung nc108 AR5112 TP2322 ELM7S08WS TP2320 smd zG sot 23 TP2323 GND194
Contextual Info: [ Z zhtz|unGwyvwypl{hy€ Y X {opzGkvj|tlu{Gjvu{hpuzGjvumpklu{phs wyvwypl{hy€Gpumvyth{pvuG{oh{Gpz zhtz|unGlslj{yvupjzGjvNzGwyvwly{€U kvGuv{GkpzjsvzlG{vGvyGk|wspjh{lGmvyGv{olyz ljlw{GhzGh|{ovyplkGi€Gzhtz|unU k k jpjospk j i jw|GGGGGGaG ihuphzVkv{ohu j—GzŒ›GaG tjoTtGvkltR

Contextual Info: H A R R CD74FCT823A, CD74FCT824A IS S E M I C O N D U I CC TT O0 RR H O ^ January 1997 \jse W &M GVJ\OS T e c W BiCMOS FCT Interface Logic, 9-Bit D-Type Flip-Flops, Three-State ,o\o9V Features Description • Buffered Inputs The CD74FCT823A and CD74FCT824A nine bit, D-Type,

Contextual Info: CD74FCT646 H A R R IS S E M I C O N D U C T O R BiCMOS FCT Interface Logic, Octal Bus Transceiver/Register, Three-State January 1997 Description Features The CD74FCT646 three-state octal bus transceiver/register uses a small geometry BiCMOS technology. The output

AM2 Processor Functional Data Sheet

Abstract: socket am3 pinout Socket am2 Processor Functional Data Sheet socket AM2 pinout BU 508 AF AM3 Processor Functional Data Sheet am3 socket pinout Case E31 273156 Y4 n diode
Contextual Info: 80960RM I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.1 5 V, PCI Signalling Environment Data Sheet Advance Information Product Features ■ ■ ■ ■ High Performance 80960JT Core ■ —Sustained One Instruction/Clock Execution

T842A

Abstract: CD74FCT842A
Contextual Info: CD74FCT841A, CD74FCT842A HARRIS S E M I C O N D U C T O R BiCMOS FCT Interface Logic, 10-Bit Transparent Latches, Three-State January 1997 Features Description V -* - ''- T h e C D 7 4 F C T 8 4 1 A and C D 7 4 F C T 8 4 2 A ten bit tra n s p a re n t

80960JT

Abstract: 80960RM 80960RP GC80960RM100 273156 af-3230
Contextual Info: 80960RM I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.1 5 V, PCI Signalling Environment Data Sheet Advance Information Product Features ■ ■ ■ ■ High Performance 80960JT Core ■ — Sustained One Instruction/Clock Execution

Contextual Info: 80960RM I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.2 Universal 5 V and 3.3 V PCI Signalling Environment (C-stepping only) Data Sheet Advance Information Product Features ■ ■ ■ ■ High Performance 80960JT Core ■ —Sustained One Instruction/Clock Execution

AE31

Abstract: 273328
Contextual Info: 80960RS I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.2 Universal 5 V and 3.3 V PCI Signalling Environment (C-stepping only) Data Sheet Advance Information Product Features ■ ■ ■ ■ High Performance 80960JT Core ■ —Sustained One Instruction/Clock Execution

Contextual Info: \ J a n u a ry 1997 \ ^ _ 1 o s 9 \ \ q r - B i t BiCMOS FCT Interface Logic, Transparent Latches, Three-State

80960RN

Contextual Info: 80960RN I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.2 Universal 5 V and 3.3 V PCI Signalling Environment (C-stepping only) Data Sheet Advance Information Product Features ■ ■ ■ ■ High Performance 80960JT Core ■ —Sustained One Instruction/Clock Execution

540L

Contextual Info: 80960RM I/O Processor • Complies with PCI Local Bus Specification, Revision 2.1 ■ 5 K PCI Signalling Environment Data Sheet Advance Information Product Features ■ High Performance 80960JT Core ■ — Sustained One Instruction/Clock Execution — 16 Kbyte, Two-Way Set-Associative

Contextual Info: CD74FCT651, CD74FCT652 H A R R IS S E M I C O N D UU CC TT O0 RR BiCMOS FCT Interface Logic, Octal Bus Transceivers/Registers, Three-State o\o9V Ja n u ya ry 1997 \J s e c w \o ' Features Description • Buffered Inputs The CD 74FCT651 and C D 74F C T 652 three-state, octal bus

Socket am2 Processor Functional Data Sheet

Abstract: AM2 Processor Functional Data Sheet BU 508 AF socket am2 pinout am3 socket pinout AM3 Processor Functional Data Sheet 3M 21001 socket am3 pinout am3 socket pin diagram intel G31 circuit diagram
Contextual Info: 80960RN I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.1 5 V, PCI Signalling Environment Data Sheet Advance Information Product Features ■ ■ ■ ■ High Performance 80960JT Core ■ —Sustained One Instruction/Clock Execution

h bridge ic

Abstract: 80960 272483
Contextual Info: 80960RN I/O Processor • Complies with PCI Local Bus Specification, Revision 2.1 ■ 5 K PCI Signalling Environment Data Sheet Advance Information Product Features ■ Two Address Translation Units ■ High Performance 80960JT Core — Sustained One Instruction/Clock Execution

Contextual Info: 80960RM I/O Processor • Complies with PCI Local Bus Specification, Revision 2.1 ■ 5 V, PCI Signalling Environment j . jii. f jii' L JcS Ie* D f f “ i Advance Information Product Features ■ Two Address Translation Units ■ High Performance 80960JT Core

Contextual Info: intei 1.0 Data Sheet — 80960RN About this Document This is the Advance Information data sheet for the 80960RN processor. This data sheet contains a functional overview, mechanical data package signal locations and simulated thermal characteristics , targeted electrical specifications (simulated), and bus functional waveforms.

AZ1008

Abstract: 80960RN
Contextual Info: 80960RN I/O Processor • Complies with PCI Local Bus Specification, Revision 2.1 ■ 5 V, PCI Signalling Environment j . jii. fjii' L JcS Ie* D f f “ i Advance Information Product Features ■ Two Address Translation Units ■ High Performance 80960JT Core

spf 9001

Abstract: sf hd60 AS0242 scr 1a 1200V CMX20003 MML 400 E1 cx240d5 SFE 5.5 MC CX24005 crouzet typ 900
Contextual Info: • P C B ■ D IN § S / l $ ^ ■ a w « » Solid State Relays TECHNOLOGIES c r y c Ê o m ìS ìt , 1 9 9 3 ^5 ^, ïÆ M W a io o o ^ Æ iâ i+0 C r y d o m m f iS M W T iju a n a á < J í S l^ f t 1 0 : # á iW x r ilí 3 Í 7 I S 0 9 0 0 2 > A iE ,

Contextual Info: intei 1.0 Data Sheet — 80960RM About this Document This is the Advance Information data sheet for the 80960RM processor. This data sheet contains a functional overview, mechanical data package signal locations and simulated thermal characteristics , targeted electrical specifications (simulated), and bus functional waveforms.

Contextual Info: S3 CD22101, CD22102 CMOS 4 x 4 x 2 Crosspoint Switch with Control Memory J a n u a ry 1997 Features Description 75£i Typ at Vpp = 12V • "Built - In” Latched Inputs • Large Analog Signal Capability. i^oc/2 • Switch Bandw

540-lead

Abstract: 273328
Contextual Info: Intel 80960RS I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.2 Universal 5 V and 3.3 V PCI Signalling Environment (C-stepping only) Data Sheet Advance Information Product Features ■ ■ ■ ■ High Performance Intel® 80960JT Core

socket am3 pinout

Abstract: am3 socket pin diagram am3 socket pinout GC80960RS100 socket AM2 pinout CAD32 NCN30
Contextual Info: Intel 80960RS I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.2 Universal 5 V and 3.3 V PCI Signalling Environment (C-stepping only) Data Sheet Product Features ■ ■ ■ ■ High Performance Intel® 80960JT Core ■ —Sustained One Instruction/Clock Execution