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    JESD 49 Search Results

    JESD 49 Result Highlights (4)

    Part ECAD Model Manufacturer Description Download Buy
    LMX2820RTCT
    Texas Instruments 22.6-GHz wideband RF synthesizer with phase synchronization, JESD and <5-µs frequency calibration 48-VQFN -40 to 85 Visit Texas Instruments
    ADS52J91ZZE
    Texas Instruments 10-bit, 12-bit, and 14-bit, multichannel, low-power ADC with LVDS and JESD outputs 198-NFBGA 0 to 70 Visit Texas Instruments
    LMX2820RTCR
    Texas Instruments 22.6-GHz wideband RF synthesizer with phase synchronization, JESD and <5-µs frequency calibration 48-VQFN -40 to 85 Visit Texas Instruments Buy
    AFE58JD28ZAV
    Texas Instruments 16-Ch Ultrasound AFE With 102mW/Ch Power, Digital Demodulator, and JESD or LVDS Interface 289-NFBGA -40 to 85 Visit Texas Instruments Buy

    JESD 49 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: www.ti.com FEATURES • • • • Member of the Texas Instruments Widebus Family Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A


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    SN74ALVCH16831 SCES083F 000-V A114-A) A115-A) SN74ALVCH1ved. PDF

    Contextual Info: SN74ALVCH16269 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS SCES019J – JULY 1995 – REVISED NOVEMBER 2000 D D D D Member of Texas Instruments’ Widebus  Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22


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    SN74ALVCH16269 12-BIT 24-BIT SCES019J 000-V A114-A) A115-A) SN74ALVCH16269 PDF

    SN74ALVC16834

    Abstract: SN74ALVC16834DL SN74ALVC16834DLR A115-A
    Contextual Info: SN74ALVC16834 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES140E – JULY 1998 – REVISED MAY 2002 D D D Member of the Texas Instruments Widebus  Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A


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    SN74ALVC16834 18-BIT SCES140E 000-V A114-A) A115-A) SN74ALVC16834 SN74ALVC16834DL SN74ALVC16834DLR A115-A PDF

    A115-A

    Abstract: SN74ALVC16834 SN74ALVC16834DL SN74ALVC16834DLR
    Contextual Info: SN74ALVC16834 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES140E – JULY 1998 – REVISED MAY 2002 D D D Member of the Texas Instruments Widebus  Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A


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    SN74ALVC16834 18-BIT SCES140E 000-V A114-A) A115-A) A115-A SN74ALVC16834 SN74ALVC16834DL SN74ALVC16834DLR PDF

    A115-A

    Abstract: C101 SN74ALVCH16831 SN74ALVCH16831DBBR
    Contextual Info: www.ti.com FEATURES • • • • Member of the Texas Instruments Widebus Family Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A


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    000-V A114-A) A115-A) SN74ALVCH16831 A115-A C101 SN74ALVCH16831DBBR PDF

    A115-A

    Abstract: C101 SN74ALVCH16831 SN74ALVCH16831DBBR
    Contextual Info: www.ti.com FEATURES • • • • Member of the Texas Instruments Widebus Family Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A


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    000-V A114-A) A115-A) SN74ALVCH16831 A115-A C101 SN74ALVCH16831DBBR PDF

    Contextual Info: SN74ALVCH16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES053F – SEPTEMBER 1995 – REVISED OCTOBER 2000 D D D D Member of Texas Instruments’ Widebus  Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A


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    SN74ALVCH16835 18-BIT SCES053F 000-V A114-A) A115-A) PDF

    Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229J – OCTOBER 1995 – REVISED SEPTEMBER 2002 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, NS,


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    SN54AHCT00, SN74AHCT00 SCLS229J 000-V A114-A) A115-A) SN54AHCT00 AHCT00 SN74AHCT00PW SN74AHCT00PWLE PDF

    Contextual Info: SN54AHCT14, SN74AHCT14 HEX SCHMITT-TRIGGER INVERTERS SCLS246P – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT14 . . . J OR W PACKAGE SN74AHCT14 . . . D, DB, DGV, N, NS, OR PW PACKAGE


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    SN54AHCT14, SN74AHCT14 SCLS246P 000-V A114-A) A115-A) SN54AHCT14 AHCT14 scyb017a PDF

    Contextual Info: SN54AHCT08, SN74AHCT08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS237L – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT08 . . . J OR W PACKAGE SN74AHCT08 . . . D, DB, DGV, N, NS,


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    SN54AHCT08, SN74AHCT08 SCLS237L 000-V A114-A) A115-A) SN54AHCT08 AHCT08 ORDERINc003d PDF

    Contextual Info: SN74CBT16212A 24-BIT FET BUS-EXCHANGE SWITCH SCDS0Q7K - NOVEMBER 1992 - REVISED MARCH 1998 5-Q Switch Connection Between Two Ports TTL-Compatible Input Levels Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per MIL-STD-833, Method 3015; Exceeds 200 V


    OCR Scan
    SN74CBT16212A 24-BIT MIL-STD-833, 300-mil PDF

    Contextual Info: 80 MHz Bandwidth, Dual IF Receiver AD6673 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B PIPELINE 11-BIT ADC HIGH SPEED SERIALIZERS CLOCK GENERATION


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    JESD204B 48-Lead AD6673-250 05-10-2012-C CP-48-13 CP-48-13 AD6673 AD6673 D10632-0-10/12 PDF

    74ACT16254

    Contextual Info: 74ACT16254 16ĆBIT ADDRESS/DATA MULTIPLEXER WITH 3ĆSTATE OUTPUTS SCAS527A − AUGUST 1995 − NOVEMBER 1995 D Member of the Texas Instruments D D D D D DGG PACKAGE TOP VIEW Widebus  Family Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17


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    74ACT16254 SCAS527A JESD-17 74ACT16254 PDF

    Contextual Info: 80 MHz Bandwidth, Dual IF Receiver AD6673 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B PIPELINE 11-BIT ADC HIGH SPEED SERIALIZERS


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    JESD204B 48-Lead AD6673-250 05-10-2012-C CP-48-13 CP-48-13 AD6673 AD6673 PR10632-0-10/12 PDF

    E19 CORE TRANSFORMER

    Abstract: CP-48-1 AD9524
    Contextual Info: 80 MHz Bandwidth, Dual IF Receiver AD6673 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B SYSREF± SYNCINB± CLK± RFCLK PIPELINE 11-BIT ADC HIGH


    Original
    JESD204B 48-Lead AD6673-250 05-10-2012-C CP-48-13 CP-48-13 AD6673 AD6673 D10632-0-10/12 E19 CORE TRANSFORMER CP-48-1 AD9524 PDF

    AD9250

    Abstract: E19 CORE TRANSFORMER AD9524 upstream docsis cmts JESD204B
    Contextual Info: 14-Bit, 170 MSPS/250 MSPS, JESD204B, Dual Analog-to-Digital Converter AD9250 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM DVDD AGND DGND DRGND AD9250 VIN+A VIN–A PIPELINE 14-BIT ADC VCM VIN+B VIN–B PIPELINE 14-BIT ADC JESD-204B INTERFACE SERDOUT0± CML, TX


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    14-Bit, MSPS/250 JESD204B, JESD204B AD9250-170 48-Lead AD9250-250 05-10-2012-C CP-48-13 AD9250 E19 CORE TRANSFORMER AD9524 upstream docsis cmts PDF

    Contextual Info: SN54AHC08, SN74AHC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS236H – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHC08 . . . J OR W PACKAGE SN74AHC08 . . . D, DB, DGV, N, NS, OR PW PACKAGE


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    SN54AHC08, SN74AHC08 SCLS236H 000-V A114-A) A115-A) SN54AHC08 AHC08 sgyc003d PDF

    74ACT16254

    Abstract: 74ACT244 74ACT245
    Contextual Info: 74ACT16254 16-BIT ADDRESS/DATA MULTIPLEXER WITH 3-STATE OUTPUTS SCAS527A – AUGUST 1995 – NOVEMBER 1995 D D D D D D Member of the Texas Instruments Widebus  Family Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Bus-Hold Inputs Eliminate the Need for


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    74ACT16254 16-BIT SCAS527A JESD-17 74ACT16254 16-bit, 74ACT244 74ACT245 PDF

    SN74LVCH16652A-EP

    Contextual Info: SN74LVCH16652AĆEP 16ĆBIT BUS TRANSCEIVER AND REGISTER WITH 3ĆSTATE OUTPUTS SCAS743 − DECEMBER 2003 D Controlled Baseline D D D D D D D D D D D D D D ESD Protection Exceeds JESD 22 − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing


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    SN74LVCH16652AEP 16BIT SCAS743 SN74LVCH16652A-EP PDF

    AHC 14

    Abstract: SN74AHC14D
    Contextual Info: SN54AHC14, SN74AHC14 HEX SCHMITT-TRIGGER INVERTERS SCLS238I – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHC14 . . . J OR W PACKAGE SN74AHC14 . . . D, DB, DGV, N, NS, OR PW PACKAGE


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    SN54AHC14, SN74AHC14 SCLS238I 000-V A114-A) A115-A) SN54AHC14 AHC14 sgyc003d AHC 14 SN74AHC14D PDF

    Contextual Info: SN74LVTH16500ĆEP 3.3ĆV ABT 18ĆBIT UNIVERSAL BUS TRANSCEIVER WITH 3ĆSTATE OUTPUTS SCBS783 − NOVEMBER 2003 D Controlled Baseline D D D D D D D D D D D D D D ESD Protection Exceeds JESD 22 − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing


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    SN74LVTH16500EP 18BIT SCBS783 PDF

    Contextual Info: SN54AHC00, SN74AHC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS227I – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 13 3 12 4 11 5 10 6 9 7 8 SN54AHC00 . . . FK PACKAGE TOP VIEW 1B


    Original
    SN54AHC00, SN74AHC00 SCLS227I 000-V A114-A) A115-A) SN54AHC00 AHC00 SN74AHC00RGYR PDF

    Contextual Info: SN74LVTH16500ĆEP 3.3ĆV ABT 18ĆBIT UNIVERSAL BUS TRANSCEIVER WITH 3ĆSTATE OUTPUTS SCBS783 − NOVEMBER 2003 D Controlled Baseline D D D D D D D D D D D D D D ESD Protection Exceeds JESD 22 − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing


    Original
    SN74LVTH16500EP 18BIT SCBS783 PDF

    74ACT16254

    Contextual Info: 74ACT16254 16-BIT ADDRESS/DATA MULTIPLEXER WITH 3-STATE OUTPUTS SCAS527A – AUGUST 1995 – NOVEMBER 1995 D D D D D D Member of the Texas Instruments Widebus  Family Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Bus-Hold Inputs Eliminate the Need for


    Original
    74ACT16254 16-BIT SCAS527A JESD-17 16-bit, 74ACT245. PDF