SN74AHCT00 Search Results

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229F – OCTOBER 1995 – REVISED OCTOBER 1998 D D D SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible EPIC  (Enhanced-Performance Implanted

SN54AHCT00

Abstract: SN74AHCT00 AHCT00
Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES S C LS 229D - O C TO B E R 1995 - R EVISED JU NE 1997 SN54AHCT00 . . . J OR W PACKAGE SN74AHC T00 . . . D, DB, DGV, N, OR PW PACKAGE TOP VIEW • Inputs Are TTL-Voltage Compatible • EPIC (Enhanced-Performance Implanted

SN74AHCT00Q

Abstract: SN74AHCT00QDRG4Q1 SN74AHCT00QDRQ1 SN74AHCT00QPWRG4Q1 SN74AHCT00QPWRQ1
Contextual Info: SN74AHCT00QĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SGDS007B − MAY 1998 − REVISED APRIL 2008 D Qualified for Automotive Applications D Inputs Are TTL-Voltage Compatible D EPIC Enhanced-Performance Implanted D D D OR PW PACKAGE (TOP VIEW CMOS) Process

SN74AHCT00

Contextual Info: SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SCLS229 - OCTOBER 1995 D, DB, N, OR PW PACKAGE {TOP VIEW Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS) Process High Latch-Up Immunity Exceeds 300 mA Per JEDEC Standard JESD-17

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, NS,

Contextual Info: SN74AHCT00QĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SGDS007B − MAY 1998 − REVISED APRIL 2008 D Qualified for Automotive Applications D Inputs Are TTL-Voltage Compatible D EPIC Enhanced-Performance Implanted D D D OR PW PACKAGE (TOP VIEW CMOS) Process

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229J – OCTOBER 1995 – REVISED SEPTEMBER 2002 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, NS,

Contextual Info: SN74AHCT00ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS507 − JUNE 2003 D Controlled Baseline D D D D D D Latch-Up Performance Exceeds 250 mA Per − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing

SN54AHCT00

Abstract: SN74AHCT00 scls229d
Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229D – OCTOBER 1995 – REVISED JUNE 1997 D D D SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible EPIC  (Enhanced-Performance Implanted

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, NS,

HB00

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, NS,

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A

Contextual Info: SN74AHCT00Q-Q1 QUADRUPLE 2-INPUT POSITIVE-NAND GATE SGDS007A – MAY 1998 – REVISED FEBRUARY 2002 D D D D D D D D OR PW PACKAGE TOP VIEW Qualification in Accordance With AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, NS,

Contextual Info: SN74AHCT00ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS507 − JUNE 2003 D Controlled Baseline D D D D D D Latch-Up Performance Exceeds 250 mA Per − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing

Contextual Info: SN74AHCT00ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS507 − JUNE 2003 D Controlled Baseline D D D D D D Latch-Up Performance Exceeds 250 mA Per − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing

SN74AHCT00

Abstract: SN54AHCT00
Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229H – OCTOBER 1995 – REVISED JANUARY 2000 D D D D EPIC  Enhanced-Performance Implanted CMOS Process Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17

Contextual Info: SN74AHCT00QĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE SGDS007B − MAY 1998 − REVISED APRIL 2008 D OR PW PACKAGE TOP VIEW D Qualified for Automotive Applications D Inputs Are TTL-Voltage Compatible D EPIC (Enhanced-Performance Implanted D D CMOS) Process

Contextual Info: SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229A - OCTOBER 1995 - REVISED MARCH 1996 • • • • Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS Process High Latch-Up Immunity Exceeds 250 mA Per JEDEC Standard JESD-17

Contextual Info: SN74AHCT00-EP QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS507 – JUNE 2003 D D D D D D D Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources DMS Support