J 5011 Search Results

40CR

Contextual Info: □ATE 1 -7 -9 8 REVI5IO N5 REV E.C.N. M O B R D R ,/ A CATHODE MARK 1.60C0.063] R0.4O[R0,01é] - - I j J c2.00C0.079] .u u L u .u /y j r - r 1 , 1 0 : 0 ,0 4 3 ] ] >m 0.50C0.020: 3.20C0.126] J AN O D E a H « L a 50110,020] CATHODE PAD SIZE e.00[0.079] TAPE DIR ECTIO N

Contextual Info: 3 N O . i 2 PART NAME FINISH MATERIAL U L U 4z U o n j \ o y y c r RECEPTACLE HOUSING © R ECEPTA CLE TERMINAL PHOSPHOR BRONZE V — 9 4 V G.F.PRT .Rl ACK -III - R 4 V -0 A U /V fffq j : Q < j L/" 5: Q - J L K 73 J \ - © SHILED COVER I B H STEEL © NUT

i203

Abstract: 20/TA-3808
Contextual Info: 10 E*~— • üto-.- M — — -.-J J 22.86 & f i ^ W r a iy ^ T n U n in n f fc r 5540 I-5011,60 11,64 11 F ±3 55401-5031,603 1,643 I C S fflo APPLY FOR 5 5 4 0 1-50 11,60 11,6 4 11. £85 «n j\0'Jycf N O TES I. u \ - PBT (UL94V-0) , PBT (UL94V-0) ,

5v dc to 220v ac inverter

Abstract: bargraph LCD 50115a COP822C COP820CJ ABB D1 COPCJ822 COP820CJ Family pj 88 LV
Contextual Info: COP82QC J/COP822C J/COP823C J National Semiconductor COP820CJ/COP822CJ/COP823CJ Single-Chip microCMOS Microcontroller G eneral Description The COP82DCJ is a member of the COPS 8-bit Microcon­ troller family. It is a fully static Microcontroller, fabricated

Contextual Info: SKHI 21A R . Absolute Maximum Ratings Symbol Conditions R^954&5 R^9KK4&5 b9H1M?HB)( /9? ,H?BI '9B1@J( ?%&4O E5?H1 )&J5@B '9B1O 8D&J2: +H1?H1 ?(@L >H%%(51 +H1?H1 @'(%@J( >H%%(51 4@YO )0&1>2&5J K%([H(5>I G9BB(>19% (4&11(% '9B1@J( )(5)( @>%9) 12( E^_/ R@1( 9K %&)( @5$ K@BB 9K '9B1@J( )(>95$@%I

74LCX109

Abstract: 74LCX109M 74LCX109MTC 74LCX109MX 74LCX109SJ 74LCX109SJX dc cdi diagram
Contextual Info: PRELIMINARY Semiconductor LCX109 & N a tio n a l 74LCX109 Dual J-K Flip-Flops with Preset and Clear with 5V Tolerant Inputs General Description Features The 74LCX109 are dual J-K flip-flops. Each flip-flop has In­ dependent J, K, PRESET, CLEAR, and CLOCK Inputs and

Contextual Info: 8-B it Latch/Register with Readback SN54/74LS793 SN54/74LS794 F e a tu re s /B e n e fits O rdering inform ation • I/O port configuration enables output data back onto input bus PART NUMBER PKG SN54LS793 SN74LS793 J,W,L N,J Mil Com SN54LS794 SN74LS794 J,W,L

sje 2762

Abstract: uPA671T transistor a935 a935 transistor ic-8845
Contextual Info: h — '> U =1 > Silicon Transistor UPA671T P N P X l h 7 > fé J ^ Æ v 7 ^ 6 t f > 2 IU îèS Ü 'f iÆ /¿PA671TO, h 7 > v Z $ £20Ï&F*3Ü? U/c 5 K x / \ '< x U , Ü H æ j f CD[S]±, x h ^ g lM i;: » i l / S t o <=D m o S C - 7 0 / \° "J * T- v £ IH D tt- - f X < D / \" "J >t -

Contextual Info: S IN G L E S U PP LY Q U A D C lo c k w o rk s "’ * C V A i P O r V J V c r fU ir SEMICONDUCTOR P E C L -K M 'T L SY1UH841 .- I | T p i j t f-r-J A R I 'J U ! K U ' i - H M W L L -iV' 10QH841 D E S C R IP TIO N FEATURES Translates positive ECL to TTL PECL-to-TTL

Contextual Info: 5159 series, styles D, E, F, F24/H7 Housings for crimp contacts Contacts have to be ordered separately, see page 100. Style D 5159 035 29 03 a Is 0 -6 -t Style E J J 2 4 (3 .3 4 6 ) r ‘ I J 5159 036 29 03 ou L _ 13. 5 ^ (. 531) o £ H 0 4 (3 .3 0 7 )

Contextual Info: National ÆÆ Semiconductor Not Intended For New Designs 100135 Triple J-K Flip-Flop General Description Features The 100135 contains three J-K, edge-triggered masterslave flip-flops with true and complement outputs. All have individual Clock CPn , Clear (Cn), and Set (Sn) inputs.

100135DC

Contextual Info: F100135 Triple J-K Flip-Flop General Description Features The F100135 contains three J-K, edge-triggered masterslave flip-flops with true and complement outputs. All have individual Clock CPn , Clear (Cn), and Set (Sn) inputs. Clocking occurs on the rising edge of CPn. All inputs have

Numeric Digital HPE 1150

Abstract: SSS725 delta inverter dac 08N PM725CJ A0018C MC1408L8 AD7506JN SSS1408-7Q pmi mux 08
Contextual Info: TABLE OF CONTENTS I E | Q.A. PROGRAM J INDUSTRY CROSS REFERENCE. 3 | FUNCTIONAL REPLACEMENT GUIDE 3 OPE R ATIO NAL AMPLIFIERS BUFFERS '.VOLTAGE TOLLOWERSl COMPARATORS MATC HLD TRANSISTORS | VOL1 AGE RLE ERE N t ES 3 3 3 3 j E D A CONVERTERS | MULTIPLEXERS ANALOG SWI1CUES

CHU-8

Abstract: TL1J1 AN501 AN5011 ANS011 AN-S011
Contextual Info: AN5011 =t l^fcTfSIC AN5011 t-u • e * • * 1 0 tv E lectron ic Channel S election Circuit * AN 5011 ■ h us/ U nit : m m I t, m v U ' l 1<E a « i • ? o A t> ? > }■n - A - E J g f r , U P - D O W N ? fS l]|fr, rm w rts i s \ z J: U P - D O W N ffiWfn] “T#ts

quad 4 to 1 mux

Contextual Info: ECL 10KH High-Speed Emitter-Coupled Logic Family M C 10H 174 D ual4-to-1 M ultiplexer Features/ Benefits Ordering Information • Propagation delay 1.5 ns typical I PART NUMBER PACKAGE TEMPERATURE j J,N,NL 20 Com • Power dissipation, 305 mW typical • Noise margin 150 mV

ECL10KH

Abstract: a10340a EI MAKES FUSE
Contextual Info: ADV MICRO P L A/ PL E/ AR RAY S lt. j i J 0257S3t. QQB7440 =1 Programmable Array Logic ‘ ^ ECL PAL Dévice PAL10H20G8 ' T- 46-13-47 Features/Benefits . . Features • 20 logic Inputs: 12 external, 8 feedback Each output latch has a bypass fuse, for creating a combinatorial

2743002122

Abstract: 2 TZ 11w
Contextual Info: 60MHz, 2 0 0 0 V / j j l s Monolithic Op Amp ANALOG DEVICES FEATURES Wide Bandwidth: 60MHz at Gain of - 1 33MHz at Gain of -1 0 Very High Output Slew Rate: Up to 2000V/|is 20MHz Full Power Bandwidth, 20V pk-pk. RL=500ft Fast Settling: 100ns to 0.1% 10V Step

SM8G

Abstract: TOSHIBA THYRISTOR
Contextual Info: TO SHIBA SM8 G, J 45 SM8(G, J)45A Triac U n it in m m Silicon Planar Type Bi-Directional Triode Thyristor AC Power Control Applications F e a tu re s • Repetitive Peak Off-State Voltage - V DRM = 400 ~ 600V • R.M.S, O n-State Current ‘ ^T(RMS) = 8 A

d 3011 k

Abstract: 7499211420
Contextual Info: CUSTOMER TERMINAL RoHS LEAD Pb — FREE Sn100% Yes Yes nos k O w E -M ID C O M ELECTRICAL SPECIFICATIONS 25°C u n less otherw ise noted: TEST CONDITIONS VALUE INDUCTANCE PARAMETER J1 - J 2 100kHz, lOOmVAC, BmADC, Lp 350uH min. INDUCTANCE J3 - J 6 100kHz, lOOmVAC, BmADC, Lp

75174

Abstract: 96175 A96174 RS-422A a 96175 M9617 UA96174DC
Contextual Info: ¿ZA96172 •¿iA96174 F A IR C H J IL D Quad Differential Line Drivers A Schlum berger C om pany Linear Division Interface Products Description Connection Diagram 16-Lead DIP Top View The J/A96172 and mA 961 74 are high speed quad differen­ tial line drivers designed to m eet EIA Standard RS-485.

MUX2T01

Abstract: MUX4T01
Contextual Info: •JUL J Ü 9 S3- GEC PLES S EY J U N E 1993 S E M I C O N D U C T O R S DS3820 - 1.0 CLA80000 SERIES HIGH DENSITY CMOS GATE ARRAYS INTRODUCTION ARRAY SIZES The new CLA80k gate array series from GEC Plessey Semiconductors offers advantages in speed and density

RCA SK CROSS-REFERENCE

Abstract: CD4003 2N2505 TF408 1N4465 250PA120 2N3017 pt 3570 trw rf pa189 Semicon volume 1
Contextual Info: 1969 o < 00 x ic e uo <r\ *—4 rO O CM u J 'r < o o o CO r aJ. rfrr.~> y -< z X— < P“ -J Sem iconductor Annual At .0008" Dia. . . . there is no second source phire orifice insert. Tempress also created and supplied the tungsten carbide ultrasonic bonding tool and pioneered

NJL5171K

Contextual Info: NJL5171K g jR Ç l • ÿfKEKfiWitt # fô : i lUitttiniïftLED i: m ^ & tn s w * h > 7 - i ><7)S'MÜ • f ë W W 7 í M J 7 U NJL5171K/71KFIÏ, 9 %-Ìl-à-tìrfc, ÏÏX'Te • jîS'Hi1 !• 1.65mmX2.6mmX4.4mm) •m ijtil y I' 7 / •ÄfÜ*. íSS/NJ-t ■ ffl

MSBH

Contextual Info: J V \ Æ A \ J V \ High Speed 12-Bit M onolithic D/A Converters Features The MX565A and MX566A are 12-bit m o n o lith ic digital to analog converters DACs built in b ip o la r te ch ­ n ology that o ffe r an excellent co m b in a tio n of high