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    IW4027BD Search Results

    IW4027BD Datasheets (2)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    IW4027BD
    		Integral Dual JK Flip-Flop Original PDF 49.09KB 6
    IW4027BD
    		Integral Dual JK flip-flop, high-voltage silicon-gate CMOS Original PDF 86.56KB 4

    IW4027BD Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    IW4027B

    Abstract: IW4027BD IW4027BN 08335 IZ40
    Contextual Info: TECHNICAL DATA IW4027B Dual JK Flip-Flop The IW4027B is a Dual JK Flip-Flop which is edge-triggered and features independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positivegoing edge of the Clock. The active HIGH asynchronous Reset and


    Original     		IW4027B IW4027B IW4027BN IZ4027B IW4027BD IW4027BN 08335 IZ40 PDF

    04215

    Abstract: IW4027B IW4027BD IW4027BN
    Contextual Info: TECHNICAL DATA IW4027B Dual JK Flip-Flop The IW4027B is a Dual JK Flip-Flop which is edge-triggered and features independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positivegoing edge of the Clock. The active HIGH asynchronous Reset and Set


    Original     		IW4027B IW4027B IW4027BN Plasti03 IZ4027B 04215 IW4027BD IW4027BN PDF

    IW4027B

    Abstract: IW4027BD IW4027BN
    Contextual Info: TECHNICAL DATA IW4027B Dual JK Flip-Flop High-Voltage Silicon-Gate CMOS The IW4027B is a Dual JK Flip-Flop which is edge-triggered and features independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positivegoing edge of the Clock. The active HIGH asynchronous Reset and Set


    Original     		IW4027B IW4027B IW4027BD IW4027BN PDF