IS61L Search Results

IS61LV6424

Contextual Info: ISSI IS61LV6424 64K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES • High-speed access time: 9, 10, 12, 15 ns • CMOS low power operation ❑ 594 mW max. operating @ 9 ns ❑ 36 mW (max.) CMOS standby • TTL compatible interface levels • Single 3.3V power supply

IS61LPD51236A

Abstract: IS61LPD102418A IS61VPD102418A IS61VPD51236A
Contextual Info: IS61VPD51236a IS61VPD102418a IS61lPD51236a IS61LPD102418a 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

Contextual Info: IS61LV3216L ISSI 32K x 16 LOW VOLTAGE CMOS STATIC RAM FEATURES • High-speed access time: 10, 12,15, and 20 ns • CMOS low power operation — 130 mW typical operating — 150 fiW (typical) standby • TTL compatible interface levels • Single 3.3V + 10%, -5% power supply for 10

Contextual Info: m IS61LV256 32K x 8 LOW VOLTAGE CMOS STATIC RAM i Fe b r u a r y 1996 FEATURES DESCRIPTION • High-speed access time: 12, 15, 20, 25 ns The ISSI IS61LV256 is a very high-speed, low power, 32,768-word by 8-bit static RAM. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable pro­

Contextual Info: m IS61LV6424 64K x 24 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY i ADVANCE INFORMATION SEPTEMBER 1997 FEATURES DESCRIPTION • High-speed access time: 10, 12,15, and 20 ns The IS S IS61LV6424 is a high-speed, 1,572,864-bit static RAM organized as 65,536 words by 24 bits. It is fabricated

Contextual Info: IS 6 1 L V 5 1 2 8 issr 512K x 8 HIGH-SPEED CMOS STATIC RAM ADVAN^'" R “AT'°N JU LY 1999 FEATURES DESCRIPTION • High-speed access times: 1 0 ,1 2 and 15 ns The IS S IS61LV5128 is a very high-speed, low power, 524,288-word by 8-bit CMOS static RAM. The IS61LV5128

Contextual Info: ISSI IS61LV6424 64K x 24 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY ADVANCE INFORMATION FEBRUARY 1998 FEATURES DESCRIPTION • High-speed access time: 10, 12,15, and 20 ns The IS S IS61LV6424 is a high-speed, 1,572,864-bit static RAM organized as 65,536 words by 24 bits. It is fabricated

Contextual Info: 64K x 32 LOW VOLTAGE SYNCHRONOUS PIPELINE STATIC RAM ADVANCE INFORMATION MARCH 1997 FEATURES DESCRIPTION • Fast access time: The IS S I IS61LV6432 is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the Pentium , 680X0™,

Contextual Info: m IS61LV6432 64Kx 32 SYNCHRONOUS PIPELINE STATIC RAM i FEBRUARY 1998 FEATURES DESCRIPTION • Internal self-timed write cycle The IS S IS61LV6432 is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the Pentium , 680X0™,

IS61LPD102418A

Abstract: IS61LPD51236A IS61VPD102418A IS61VPD51236A
Contextual Info: ISSI IS61VPD51236A IS61VPD102418A IS61LPD51236A IS61LPD102418A 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

IS61LPS102418A

Abstract: IS61LPS25672A IS61LPS51236A IS61VPS102418A IS61VPS25672A IS61VPS51236A IS61LPS51236A-200TQLI 1024Kx18
Contextual Info: IS61VPS25672A IS61LPS25672A IS61VPS51236A IS61LPS51236A IS61VPS102418A IS61LPS102418A ISSI 256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

IS61LV51216

Abstract: IS61LV51216-8TL is64lv51216-12ta3 IS64LV51216 D1206
Contextual Info: IS61LV51216 IS64LV51216 ISSI 512K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES • High-speed access time: — 8, 10, and 12 ns • CMOS low power operation • Low stand-by power: — Less than 5 mA typ. CMOS stand-by • TTL compatible interface levels

IS61LV25616

Contextual Info: ISSI IS61LV25616 256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES NOVEMBER 2001 DESCRIPTION The ISSI IS61LV25616 is a high-speed, 4,194,304-bit static • High-speed access time: — 10, 12, and 15 ns • CMOS low power operation

IS61LV12816

Contextual Info: ISSI IS61LV12816 128K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY NOVEMBER 2000 FEATURES DESCRIPTION • • • • • The ISSI IS61LV12816 is a high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly

IS61LPS25632A

Abstract: IS61LPS25636A IS61LPS51218A IS61VPS25636A IS61VPS51218A
Contextual Info: IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A, IS61VPS51218A, IS61VPS25636A 256K x 36, 256K x 32, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

S2103

Abstract: S2104
Contextual Info: IS61LV6424 64K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES • High-speed access time: 9, 10, 12, 15 ns • CMOS low power operation — 594 mW max. operating @ 9 ns — 36 mW (max.) CMOS standby • TTL compatible interface levels • Single 3.3V power supply

IR-021

Contextual Info: ISSI IS61VPD51236A IS61VPD102418A IS61LPD51236A IS61LPD102418A 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

Contextual Info: IS61LSSDH51236 IS61LSSDH102418 ISSI ΣQUAD 18Mb Σ2x2B2 ADVANCE INFORMATION DECEMBER 2002 DDR SEPERATE I/O SRAM FEATURES • Simultaneous Read and Write SigmaQuad Interface • SigmaRAM™ JEDEC standard pinout/package • Dual Double Data Rate interface

Contextual Info: IS61LSCS25672 IS61LSCS51236 ISSI SRAM 256K X 72, 512K X 36 ADVANCE INFORMATION JUNE 2002 18MB SYNCHRONOUS SRAM FEATURES • JEDEC SigmaRam pinout and package standard • Single 1.8V power supply VCC : 1.7V (min) to 1.9V (max) • Dedicated output supply voltage (VCCQ): 1.8V

Contextual Info: ISSI IS61LV256 32K x 8 LOW VOLTAGE CMOS STATIC RAM April 2004 FEATURES • High-speed access times: - 8, 10, 12, 15 ns • Automatic power-down when chip is deselected • CMOS low power operation - 345 mW max. operating - 7 mW (max.) CMOS standby

Contextual Info: IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A, IS61VPS51218A, IS61VPS25636A 256K x 36, 256K x 32, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

Contextual Info: IS61LV3224 32K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY p r e l im in a r y AUGUST 1999 FEATURES DESCRIPTION • High-speed access time: 9, 10, 12,15 ns • CMOS low power operation The lS S I IS61LV3224 is a high-speed, static RAM organized as 32,768 words by 24 bits. It is fabricated using IS S I's highperformance CMOS technology. This highly reliable process

IS61LV25616-12T

Contextual Info: IS61LV25616 256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES • • • • • High-speed access time: 8, 10, 12, and 15 ns CMOS low power operation TTL compatible interface levels Single 3.3V ± 10% power supply Fully static operation: no clock or refresh

Contextual Info: IS61LV6416 64K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES • High-speed access time: 8, 10, 12, and 15 ns • CMOS low power operation — 250 mW typical operating — 250 µW (typical) standby • TTL compatible interface levels • Single 3.3V power supply