IR 245P Search Results

74HC245DW

Abstract: M74HC245P
Contextual Info: MITSUBISHI HIGH SPEED CMOS M 74H C 245P/FP /D W P O C TAL 3-STATE NONINVERTING BUS TR A N S C E IV ER DESCRIPTION The M 74H C 245 is a sem iconductor integrated circuit con­ PIN CONFIGURATION TOP VIEW sisting of eigh t tra nsceivers w ith noninverted outputs.

TL018

Abstract: 5334S SLR-54UT SLR-54dc TLR134AP TLRA245P TLRC182P TLRC241P TLS133AP TLS241P
Contextual Info: 6 i p ÏS « £ it T .,= 25'C ' * * « « •d t V* :V i If im A ÌF Vh 'm A : ¡V! \0 2 f.r. Ar m m : imcd' imA ! f t k % fc >7 , = 2d C ' & i16i 9L'± is « r r n -P T L SA 180A P & i£ 8 630 1000 20 1.9 20 50 4 '3 0 '8 5 84 630m m S ¡*f iS T L R A 245P

IR 245P

Contextual Info: /<93 Z86C81 CMOS ROMIess Z8 Microcomputer 002453 2.L6- Product Specification Zilog February 1986 FEATURES Complete microcomputer, 24 I/O lines, and up to 64K bytes of addressable external space each for program and data memory. Full-duplex UART and two program m able 8 -bit

e50p

Contextual Info: S E M I C O N D U C T O R Revised A ugust 1999 TM 74FR245 Octal Bidirectional Transceiver with 3-STATE Outputs General Description Features The 74F R 245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. C urrent sinking capability is 64_mA on

Contextual Info: LA-LatticeECP3 Automotive Family Data Sheet Advance DS1041 Version 01.1, April 2014 LA-LatticeECP3 Automotive Family Data Sheet Introduction April 2014 Advance Data Sheet DS1041 Features  AEC-Q100 Tested and Qualified  Higher Logic Density for Increased System

LFE3-17EA-6FN484C

Abstract: LFE3-17EA-6FTN256C LFE3-17EA-7FTN256C LFE3-17EA-7FTN256I ECP3-150 ECP3-150EA LFE3-35EA-7FTN256C ECP3-35 LFE3-17EA-8FN484C LFE3-17EA6FN484C
Contextual Info: LatticeECP3 Family Data Sheet Preliminary DS1021 Version 01.5, November 2009 LatticeECP3 Family Data Sheet Introduction November 2009 Preliminary Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

Contextual Info: LA-LatticeECP3 Automotive Family Data Sheet Advance DS1041 Version 01.0, June 2013 LA-LatticeECP3 Automotive Family Data Sheet Introduction June 2013 Features Advance Data Sheet DS1041  Pre-Engineered Source Synchronous I/O • • • • DDR registers in I/O cells

Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 02.1EA, February 2012 LatticeECP3 Family Data Sheet Introduction February 2012 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

LFE3-17EA

Abstract: LFE3-35EA-6FN484C DS1021 ECP3-35 ECP3-95 16x4-Bit convolution encoders LFE335EA6FN484C LFE3-35EA-8FN484C LFE3-95EA-6FN484C
Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 01.9EA, July 2011 LatticeECP3 Family Data Sheet Introduction December 2010 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

ECP3EA

Abstract: LFE3-95EA-6FN484C Socket 1156 VID pinout DDR3 timing lfe3-17ea-6fn484c lfe3 LFE3-17EA6FN484C
Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 02.2EA, April 2012 LatticeECP3 Family Data Sheet Introduction February 2012 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

LFE3-17EA

Abstract: DS1021 ECP3-35 ECP3-95 LFE3-17EA-7FN484C lfe370e6fn672i LFE3-70EA8FN672 lfe3-70e 4420 ba LFE3-70EA-7FN484C
Contextual Info: LatticeECP3 Family Data Sheet Preliminary DS1021 Version 01.6, March 2010 LatticeECP3 Family Data Sheet Introduction November 2009 Preliminary Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

fr 3709 z

Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 02.3EA, June 2013 LatticeECP3 Family Data Sheet Introduction February 2012 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 02.4EA, September 2013 LatticeECP3 Family Data Sheet Introduction February 2012 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

ECP3EA

Abstract: LFE3-70EA-6FN672C LFE3-70EA-6FN672I lfe3-17ea-6fn484c lfe3 LFE3-17EA6FN484C LFE3-17EA
Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 01.8EA, April 2011 LatticeECP3 Family Data Sheet Introduction December 2010 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 02.7EA, April 2014 LatticeECP3 Family Data Sheet Introduction February 2012 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

LFE3-150EA-8FN1156C

Abstract: LFE3-70EA-6FN672C lfe3-17ea-6fn484c lfe3 LFE3-17EA6FN484C LFE3-17EA
Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 02.0EA, November 2011 LatticeECP3 Family Data Sheet Introduction November 2011 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

ttl buffer 74LS245

Abstract: 74LS245 application 1N3064 74LS245 G74SC245D G74SC245P
Contextual Info: G 74SC 245 H B Microcircuits C M O S Octal Bus Transceivers w ith 3-S ta te Buffered Outputs Features G en eral D escrip tio n • Pin c o m p a tib le w ith 74LS245 T h is o c ta l bus tra n s c e iv e r c irc u it is d e s ig n e d fo r h ig h -s p e e d

Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 02.5EA, February 2014 LatticeECP3 Family Data Sheet Introduction February 2012 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

Contextual Info: SE C E U DA L R a T R A tt EN S ic e T HE EC IN E P FO T 3 F R O EA M R A TI O N LatticeECP3 Family Data Sheet Preliminary DS1021 Version 01.6, March 2010 LatticeECP3 Family Data Sheet Introduction November 2009 Preliminary Data Sheet DS1021 Features • Dedicated read/write levelling functionality

Contextual Info: LatticeECP3 Family Data Sheet DS1021 Version 02.6EA, March 2014 LatticeECP3 Family Data Sheet Introduction February 2012 Data Sheet DS1021 Features • Dedicated read/write levelling functionality • Dedicated gearing logic • Source synchronous standards support

WSA20

Abstract: 74f245 CERAMIC LEADLESS CHIP CARRIER 54F245DM 74F245MSA 74F245PC 74F245SC 74F245SJ F245 J20A
Contextual Info: E M IC D N D U C T O R t 74F245 Octal Bidirectional Transceiver with 3-STATE Outputs General Description Features The ’F245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented appli­ cations. Current sinking capability is 24 m A 20 m A Mil at

SH604

Abstract: SH604ST2 8 PIN MALE TO 9 PIN FEMALE WIRING DIAGRAM FOR ALL 302SXX 402P36 303P1 SH565 176pnxxx SH194 SH515
Contextual Info: SENSOR-LINK C 3 C C 1 Conxall's Sensor-Link series includes the Mini-Mizer, AC Micrc-Mizer, DC M icro-M izer and the Nano-Mizer product lines, w hich are overmolded cable assemblies. The overmolding process provides for environmental sealing and strain relief fo r flexing applications.

S010887

Contextual Info: R C H II_ D • M IC O N D U C T O R r 74FR245 Octal Bidirectional Transceiver with 3-STATE Outputs General Description Features The ’ FR245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended fo r bus-oriented app li­

M60073

Abstract: M60084l M6008 4000 series CMOS Logic ICs "gate count" m60074 CMOS GATE ARRAYs mitsubishi 132X132
Contextual Info: ASIC Custom Semi-Custom A S S P - AV Sound Processor Audio TV VCR Peripherals Disk Drive SCSI OA Printer PPC FAX Communication Telephone Mobile Communication LAN Car/lndustriai LAN Automobile Multi-Media Image Compression/Decompression Display controller