IOT7 Search Results

IOT7210

Abstract: IEEE-488 to 0AD40
Contextual Info: Registers Internal Registers Thirteen factors can generate an interrupt from the IOT7210, each with its own status bit and mask bit. The IOT7210 has 16 registers: 8 read and 8 write. Register Name Addressing Specification R R R W R C S S S R D S 2 1 0 Data In [0R]

strs 20

Abstract: IOT7210 03v0-c
Contextual Info: Electrical Characteristics Absolute Maximum Ratings Exposing the device to stresses above those listed here could cause permanent damage to the IOT7210. The device is not meant to be operated under conditions outside the limits described in this specification. Exposure to absolute maximum

IOT7210

Abstract: SN75160 SN75161 IEEE bus data MC3448AX4 dio8
Contextual Info: IEEE 488 Transceiver Examples Low-Speed IOT7210 High-Speed MC3448AX4 GPIB DIO8 Data A Bus A DIO8 DIO7 Data B Bus B DIO7 DIO6 Data C Bus C DIO6 DIO5 Data D Bus D DIO5 S/RA-S/R D PEA-PE D DIO4 Data A Bus A DIO4 DIO3 Data B Bus B DIO3 DIO2 Data C Bus C DIO2 DIO1

IOT7210P

Abstract: IOT7210T IOT7210 SN75161 PD7210 SN75160 6D120 strs 20 MC3448AX4 03v0-c
Contextual Info: IOT7210 Low-Power CMOS IEEE 488 Controller Device NEW Features • Completely meets IEEE Standard 488-1978: - SH1, source handshake - AH1, acceptor handshake - T5 or TE5, talker or extended talker - L3 or LE3, listener or extended listener - SR1, service request

IOT7210

Abstract: PD7210 IOT721
Contextual Info: IOT7210 Low-Power CMOS IEEE 488 Controller Device NEW Features • Completely meets IEEE Standard 488-1978: - SH1, source handshake - AH1, acceptor handshake - T5 or TE5, talker or extended talker - L3 or LE3, listener or extended listener - SR1, service request

IOT7210P

Abstract: IOT7210T
Contextual Info: Package Outlines Package Outline for IOT7210P Item Millimeters A B C D E F G H I J K L 51.94-52.71 1.90-2.42 2.54 BSC 0.38-0.56 1.14-1.66 3.04-3.56 0.38-1.15 3.68-3.94 4.19-5.59 15.24-15.88 13.46-14.10 0.20-0.36 A J K H I G F B C E L D 0-15° Side View Package Outline for IOT7210T

cxo 307

Abstract: 47C1270 TV CHANNEL SELECTOR WITH 7 SEGMENT LED DISPLAY TMP47C1670N
Contextual Info: TOSHIBA UC/UP 54E J> m ^0^724^ DOl'iS'i'î 7flfl WËTQS3 T - H9-19-H4 TOSHIBA TMP47C1270/1670/007 CMOS 4-BIT MICROCONTROLLER TM P47C1270N, TMP47C1670N The 47C1270/1670 are the high speed and high performance 4-bit single chip microcomputer with large capacity ROM and RAM, based on the 47C670/870 (TLCS-470 series).

Contextual Info: INTEGRATED DEVICE tflE ]> Hi MÛ2S771 0014232 'lOT « I D T PRELIMINARY HIGH SPEED 128K 8K X 16 BIT IDT70825S SEQUENTIAL ACCESS IDT70825L RANDOM ACCESS MEMORY (SARAM ) Integrated Device Technology, Inc. FEATURES: • • • • • • • • • •

Contextual Info: IDT7133SA/LA IDT7143SA/LA CMOS DUAL-PORT RAMS 32K 2Kx 16-BIT Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High-speed access — Military: 25/35/45/55/70/90ns (max.) — Commercial: 20/25/35/45/55/70/90ns (max.) • Low-power operation — IDT7133/43SA

Contextual Info: i" &;< CMOS PARALLEL SyncFIFO CLOCKED FIFO 5 1 2 X 18-BIT & 1024 X 18-BIT FEATURES • • • • • 512 x 18-bit and 1024 x 18-bit memory array structures 20ns read / write cycle time Easily expandable in width Read and write clocks can be independent or coincident

Contextual Info: C M O S DUA L PORT RAM 1 CK 2K x 8 BIT WITH S E M A P H O R E p r e l im in a r y I D T 7 13 22 L FEATURES: DESCRIPTION: • High-speed access — Military: 45/55/70ns (max.) The IDT71322 is an extremely high-speed 2K x 8 dual-port static RAM with full on-chip hardware support of semaphore signalling

Contextual Info: TOSHI BA UC / U P 54E D • ^724=] QGnb2b TOSH IBA 20*1 « T 0 S 3 TMP47C660/860/060 CM OS 4 -BIT M ICRO CO N TR O LLER T “ V ^ “ I 9 * "HM TM P47C660N, TMP47C860N TM P47C660F, TM P47C860F The 47C660/860 have extended I/O ports and A/D converter based on th e TLCS-470 series.

Contextual Info: bflE D • MÔES771 0014SDM 7T7 ■ IDT 128K/256K BYTE CMOS IDT7MP6085 SECONDARY CACHE MODULE IDT7MP6087 FOR THE INTEL i486™ _ I N T E G R A T E D D E VI CE FEATURES: • 128K /256K byte pin-compatible secondary cache modules • Uses the ID T 7 1589 32K x 9 CacheRAM™ with burst counter

IDT71589

Abstract: fm 7088
Contextual Info: Integrated Device Technology, inc. PRELIMINARY IDT7MP6085 IDT7MP6087 128K/ 256K BYTE CMOS SECONDARY CACHE MODULE FOR THE INTEL i486™ FEATURES: • 128K/ 256K byte pin compatible secondary cache modules • Ideal for use with Chips and Technologies M/PAX™

Contextual Info: CMOS PARALLEL-TO-SERIAL FIFO 2048 x 9 4096 x 9 IDT72131 IDT72141 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • The IDT72131/72141 are high-speed, low power parallelto-serial FIFOs. These FIFOs are ideally suited to serial communications applications, tape/disk controllers, and local

at enhance v520

Contextual Info: !< & / Integrated Dev Ice Technology» Inc. BUS-MATCHING BIDIRECTIONAL FIFO 512 x 18-BIT - 1024 X 9-BIT 1024 x 18-BIT - 2048 x 9-BIT IDT7251 . '° 5 2 IDT72520 FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays lor bidirectional data transfers

71C65L

Abstract: T71C
Contextual Info: CMOS RESETTABLE RAM WITH CMOS I/O LEVELS 64K 8K x 8-BIT IDT 71C65S IDT 71C65L FEATURES: DESCRIPTION: • Input and o u tp u t d ire c tly C M O S -co m p a tib le • H ig h -spe e d (equal a cce ss and c y c le time) The ID T71C65 Is a 65,536-bit h ig h -sp ee d static RAM organized

74S381

Abstract: TTL 74S381 ALU 77 AB IDT7381
Contextual Info: INTEGRATED DEVICE 5AE D • 4025771 16-BIT CMOS CASCADABLE ALU ODlDflTl 27 3 ■ IDT IDT7381 IDT7383 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • « • • The IDT7381 and IDT7383 are high-speed cascadable Arithmetic Logic Unit ALUs . Both three-bus devices have

Morph-IC-II Datasheet

Abstract: Morph-IC II FT2232H FT2232HQ 93C56 93LC56B EP2C5F256C8N J230 format .rbf fpga loader
Contextual Info: Future Technology Devices International Ltd. Morph-IC-II Datasheet Document Reference No.: FT_000198 Version 1.04 Issue Date: 2011-02-25 Morph-IC-II is a compact, yet powerful FPGA module which is capable of synthesising LSI Large Scale Integration designs using the embedded Altera Cyclone-II FPGA. Communication between the FPGA and

Contextual Info: Future Technology Devices International Ltd. Morph-IC-II Datasheet Document Reference No.: FT_000198 Version 1.04 Issue Date: 2011-02-25 Morph-IC-II is a compact, yet powerful FPGA module which is capable of synthesising LSI Large Scale Integration designs using the embedded Altera Cyclone-II FPGA. Communication between the FPGA and

Contextual Info: CMOS PARALLEL-TO-SERIAL FIFO 2048 x 9-BIT & 4096 x 9-BIT IDT72131 IDT72141 Integrated Device Technology» Inc. FEATURES: DESCRIPTION: • 35ns parallel port access time, 45ns cycle time • 50MHz serial port shift rate • Expandable in depth and width with no external

Contextual Info: IDT72413 CMOS PARALLEL 64 X 5-BIT FIFO WITH FLAGS Integrated Device Technology, Inc. FEATURES: DESCRIPTION: First-In/First-Out Dual-Port memory— 45MHz 64 x 5 organization Low-power consumption — Active: 200mW typical RAM-based internal structure allows for fast fall-through

Contextual Info: bôE J> m 4Û25771 GG13bai B34 « I D T CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS IDT72413 INTEGRATED DEVICE FEATURES: DESCRIPTION: • • • The IDT72413 is a 64 x 5, high-speed First-In/First-Out FIFO that loads and empties data on a first-in-first-out basis.

S3023

Abstract: k39c
Contextual Info: 1=10^7250 DDDDStû ? | 9097250 TOSHIBA CDIS C R E T E / O P T O t t t - k P I N ' 9 V : * - K 39C 0 0 5 6 8 _ D 7 - 0 ? ' 'S ' Unit :m m i»3.g MAX O o o . £ SHis. S $ «§. 9 * s '* M e d i u m P o w e r R F S w i t c h i n g A p p l i catione,