IO175RSB2 Search Results

A3P600

Abstract: A3P060 A3P1000 A3P125 A3P250 AECQ100 AEC-Q100 FG144 FG256 FG484
Contextual Info: v1.0 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches High-Temperature AEC-Q100–Qualified Devices • Grade 2 105°C TA 115°C TJ • Grade 1 125°C TA (135°C TJ)

A3PE3000L FG484

Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
Contextual Info: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for

A3P250

Abstract: A3P060 A3P1000 Datasheet A3P125 IO97RSB2 IO52NDB1 FBGA A3P250 fbga 256 A3P250 ACTEL ACTEL FBGA 144
Contextual Info: Automotive ProASIC3 Packaging 3 – Package Pin Assignments 100-Pin VQFP 100 1 Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .

Contextual Info: Revision 22 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

Contextual Info: Revision 15 ProASIC3 Flash Family FPGAs with Optional Soft ARM Support Features and Benefits Advanced I/O High Capacity • 15 K to 1 M System Gates • Up to 144 Kbits of True Dual-Port SRAM • Up to 300 User I/Os Reprogrammable Flash Technology • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS

ProASIC3 Flash Family

Contextual Info: Revision 5 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches Extended Temperature AEC-Q100–Qualified Devices • Grade 2: –40°C to 105°C TA 115°C TJ

A3P1000

Abstract: 160 e7 Datasheet A3P125 FBGA A3P250 A3P030 FBGA A3P600
Contextual Info: ProASIC3 Packaging 3 – Package Pin Assignments 48-Pin QFN Pin 1 48 1 Notes: 1. This is the bottom view of the package. 2. The die attach paddle center of the package is tied to ground GND . Note For Package Manufacturing and Environmental information, visit the Resource Center at

A3P060

Abstract: A3P125 A3P400 A3P030 FBGA A3P600 A3P1000
Contextual Info: ProASIC3 Packaging 3 – Package Pin Assignments 48-Pin QFN Pin 1 48 1 Notes: 1. This is the bottom view of the package. 2. The die attach paddle center of the package is tied to ground GND . Note For Package Manufacturing and Environmental information, visit the Resource Center at

A3PE3000L FG484

Abstract: A3PE3000L A3PE600L
Contextual Info: Revision 3 Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • Architecture Supports Ultra-High Utilization Advanced and Pro Professional I/Os†† Military Temperature Tested and Qualified • • • • • Each Device Tested from –55°C to 125°C

Contextual Info: Revision 12 ProASIC3L Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for

AGL400

Abstract: IO30RSB0 IO127RSB2 AGL1000 ACTEL FBGA 144 qfn 132pin
Contextual Info: IGLOO Packaging 3 – Package Pin Assignments 81-Pin µCSP A1 Ball Pad Corner 9 8 7 6 5 4 3 2 1 A B C D E F G H J Note: This is the bottom view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .

flashpro3 schematic

Abstract: ProASIC3 A3P250 A3P600 FlashPro3 zener Diode B23 A3P030 A3P060 A3P125 A3P250 A3P400
Contextual Info: Advanced v0.5 ProASIC3 Flash Family FPGAs TM ARM7 Soft IP Support in ProASIC3 ARM7-Ready Devices Features and Benefits • • • • • 30 k to 1 Million System Gates Up to 144 kbits of True Dual-Port SRAM Up to 300 User I/Os Reprogrammable Flash Technology

Contextual Info: Revision 13 ProASIC3 Flash Family FPGAs with Optional Soft ARM Support Features and Benefits Advanced I/O High Capacity • 15 k to 1 M System Gates • Up to 144 kbits of True Dual-Port SRAM • Up to 300 User I/Os Reprogrammable Flash Technology • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS

FlashPro3

Abstract: 517000 TRANSISTOR ww1 A3P030 A3P060 A3P125 A3P250 FG144 PQ208 QN132
Contextual Info: Advanced v0.2 ProASIC3 Flash Family FPGAs Features and Benefits • • • High Capacity • • • Advanced I/O 30 k to 1 Million System Gates Up to 144 kbits of True Dual-Port SRAM Up to 288 User I/Os Reprogrammable Flash Technology • • • •

A3P060

Abstract: A3P125 A3P250 PQ208 QN132 QN68 VQ100 A3P030 2114 1k x 4 SRAM
Contextual Info: v1.1 ProASIC3 Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits High Capacity • 15 k to 1 M System Gates • Up to 144 kbits of True Dual-Port SRAM • Up to 300 User I/Os Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS Process

A3PE3000L

Abstract: 896-pin A3PL600 IO10PDB0V1 IO283PDB7V1 FBGA 896
Contextual Info: ProASIC3L Packaging 3 – Package Pin Assignments 100-Pin VQFP 100 1 Note: This is the top view of the package. Figure 3-1 • Note For Package Manufacturing and Environmental information, visit the Resource Center at .

national semiconductor catalog

Abstract: A3P015
Contextual Info: Revision 12 ProASIC3 Flash Family FPGAs with Optional Soft ARM Support Features and Benefits Advanced I/O High Capacity • 15 k to 1 M System Gates • Up to 144 kbits of True Dual-Port SRAM • Up to 300 User I/Os Reprogrammable Flash Technology • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS

AGL400

Abstract: TOP MARK E6 T7IO192NPB3
Contextual Info: IGLOO Packaging 3 – Package Pin Assignments 81-Pin µCSP A1 Ball Pad Corner 9 8 7 6 5 4 3 2 1 A B C D E F G H J Note: This is the bottom view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .

semi catalog

Abstract: AGL015
Contextual Info: Revision 22 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

Datasheet AGLN020

Abstract: FG144 QN132 VQ100 IO45PDB1 AGL015
Contextual Info: v2.0 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS

cortex a15

Abstract: cortex a15 core ARM PROCESSOR CORTEX M-3 PQ208 A3PE3000L FG324 FG484 TDP 246
Contextual Info: v1.1 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for

AGL015

Abstract: AGL400 FG144 QN132 VQ100 ProASIC3
Contextual Info: v1.5 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X†, and

A3P125

Abstract: A3P030 A3P060 A3P250 QN132 QN68 TQ144 VQ100
Contextual Info: v1.3 ProASIC3 Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits High Capacity • 15 k to 1 M System Gates • Up to 144 kbits of True Dual-Port SRAM • Up to 300 User I/Os Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS Process

A3PE3000L FG484

Abstract: Cortex-m1 A3PE3000L A3PE600L
Contextual Info: Revision 3 Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • Architecture Supports Ultra-High Utilization Advanced and Pro Professional I/Os†† Military Temperature Tested and Qualified • • • • • Each Device Tested from –55°C to 125°C