INP34 Search Results

outp32

Abstract: M21130 AA30 AA34 AB30 OUTP23 NCN30
Contextual Info: M21130 68 x 68 3.2 Gbps Crosspoint Switch with Input Equalization Data Sheet Features - 4 Terminal Descriptions - 5 Specification Tables - 8 Functional Description - 17 Register Information - 20 Package Information - 25 World Wide Sales Companies - 34 21130-DSH-001-B, 3/27/03

AD9763

Abstract: AD9763AST AD9763-EB AWG2021
Contextual Info: a FEATURES 10-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR to Nyquist @ 5 mHz Output: 75 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation

48-PIN

Abstract: AD9709 AD9709AST AD9709-EB AWG2021
Contextual Info: a FEATURES 8-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR to Nyquist @ 5 MHz Output = 66 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation

SMA200UP

Abstract: AD9767-EBZ
Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM 10-/12-/14-bit dual transmit digital-to-analog converters DACs 125 MSPS update rate Excellent SFDR to Nyquist @ 5 MHz output: 75 dBc Excellent gain and offset matching: 0.1% Fully independent or single-resistor gain control

Contextual Info: 10-/12-/14-Bit, 125 MSPS Dual TxDAC+ Digital-to-Analog Converters AD9763/AD9765/AD9767 FEATURES FUNCTIONAL BLOCK DIAGRAM 10-/12-/14-bit dual transmit digital-to-analog converters DACs 125 MSPS update rate Excellent SFDR to Nyquist @ 5 MHz output: 75 dBc

AD9767

Abstract: AD9767AST AD9767-EB
Contextual Info: a FEATURES 14-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR and IMD: 82 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation

C8380

Abstract: AD804 AD9765 AD97651 AD9765AST AD9765-EB
Contextual Info: a FEATURES 12-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR to Nyquist @ 5 MHz Output: 75 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation

Contextual Info: a Preliminary Technical Data FEATURES 8-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR and IMD: 67 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference

T1-1TCUP

Abstract: SMA200UP AD9709 DS90LV048B
Contextual Info: 8-Bit, 125 MSPS, Dual TxDAC+ Digital-to-Analog Converter AD9709 FEATURES FUNCTIONAL BLOCK DIAGRAM 8-bit dual transmit digital-to-analog converter DAC 125 MSPS update rate Excellent SFDR to Nyquist @ 5 MHz output: 66 dBc Excellent gain and offset matching: 0.1%

C3582a-0-2

Abstract: AD9763 AD9763AST AD9763-EB AWG2021 transmission line transformer
Contextual Info: a FEATURES 10-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR and IMD: 78 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation

INP36

Abstract: INP30 an555 INP34 INP28 INP14 INP-24 AD9763 AN-555 TP10
Contextual Info: a AN-555 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • 781/329-4700 • World Wide Web Site: http://www.analog.com Using the AD9709, AD9763, AD9765, AD9767 Dual DAC Evaluation Board By Steve Reine and Dawn Ostenberg GENERAL DESCRIPTION

Contextual Info: a FEATURES 10-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR and IMD: 80 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation

IC74HC112

Abstract: INP36
Contextual Info: 8-Bit, 125 MSPS, Dual TxDAC+ Digital-to-Analog Converter AD9709 8-bit dual transmit digital-to-analog converter DAC 125 MSPS update rate Excellent SFDR to Nyquist @ 5 MHz output: 66 dBc Excellent gain and offset matching: 0.1% Fully independent or single-resistor gain control

220V ferrite core transformer

Abstract: AD9767AST C3583 capacitor 100MF 100v AD9767 AD9767-EB vdsl splitter circuit diagram
Contextual Info: a FEATURES 14-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR and IMD: 82 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation